This article presents a three‐stage 25 to 30 GHz linear CMOS power amplifier (PA) for fifth‐generation (5G) applications. In order to improve the linearity by compensating AM‐AM/AM‐PM distortion, we propose a driver stage RF predistortion technique in which a first drive amplifier (DA) operates in class C mode and a second DA operates in class A mode. By enhancing the linearity with the technique, the PA can be operated at more deep class‐AB bias condition with less back‐off. As a result, the efficiency of the PA at operating output power can thus be increased. The PA with the predistortion technique is designed and fabricated in bulk 65 nm 1 V CMOS process. The linear PA achieves 16.9 dBm P_sat with 34.5% power‐added efficiency (PAE) and 15.9 dBm P_1dB with 32% PAE at 27 GHz. At an average power of 9.3 dBm, the PA achieves the EVM of −25 dBc and PAE of 11.4% at 27 GHz.

中文翻译：

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使用驱动器级RF预失真技术的1 V 25至30 GHz三级线性CMOS功率放大器

本文介绍了适用于第五代（5G）应用的三级25至30 GHz线性CMOS功率放大器（PA）。为了通过补偿AM-AM / AM-PM失真来改善线性度，我们提出了一种驱动器级RF预失真技术，其中第一驱动放大器（DA）工作在C类模式下，而第二DA工作在A类模式下。通过使用该技术增强线性度，PA可以在更深的AB类偏置条件下工作，而回退较少。结果，可以提高功率放大器在工作输出功率下的效率。采用预失真技术的功率放大器是在65 nm 1 V CMOS工艺中设计和制造的。线性PA达到16.9 dBm的P_坐在与34.5％的功率附加效率（PAE）和15.9 dBm的P _1分贝在27 GHz时具有32％的PAE。在27 GHz时，PA的平均功率为9.3 dBm，EVM为-25 dBc，PAE为11.4％。