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Stochastic Wave-Pipelined On-Chip Interconnect
IEEE Transactions on Circuits and Systems II: Express Briefs ( IF 4.4 ) Pub Date : 2020-05-01 , DOI: 10.1109/tcsii.2020.2984194
Amir Najafi , Ardalan Najafi , Alberto Garcia-Ortiz

A major bottleneck of current integrated circuits is the performance of on-chip communication. It can be dramatically improved using wave-pipelining, which is very power efficient since it avoids additional pipeline registers. However, the error-free operation is getting challenging as technology scales down. Recently, approximate/stochastic communication is gaining interest since it allows to trade-off transmission quality by performance/power in resilient applications such as machine learning. Taking into account the challenges of classical wave-pipelining, this brief proposes the concept of stochastic wave-pipelining communication. A comprehensive experimental result using a 65 nm commercial technology evaluates the proposed communication technique. Furthermore, the proposed approach is assessed using a case study employing Optical Character Recognition (OCR).

中文翻译:

随机波流水线片上互连

当前集成电路的一个主要瓶颈是片上通信的性能。使用波形流水线可以显着改善它,这是非常节能的,因为它避免了额外的流水线寄存器。然而,随着技术规模的缩小,无错误操作变得越来越具有挑战性。最近,近似/随机通信引起了人们的兴趣,因为它允许在机器学习等弹性应用程序中通过性能/功率来权衡传输质量。考虑到经典波浪流水线的挑战,本文提出了随机波浪流水线通信的概念。使用 65 nm 商业技术的综合实验结果评估了所提出的通信技术。此外,
更新日期:2020-05-01
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