Memory-based reconfigurable computing rose to outperform conventional FPGAs in logic function density, as well as being less impacted by the programmable interconnection. However, the major drawback is that the area and power overheads are significant, and this gets worse in high-density, high-performance Memory-based Computing (MBC) devices. In this brief, we investigate the usage of analog memristive CAMs to improve the area density of MBCs, thus enabling denser memories and smaller power consumption. Simulation results indicate significant area and energy savings, up to $2.2\times $ and $2.6\times $ , respectively, compared to the non-volatile counterparts, at the cost of increasing latency by up to 20%.

中文翻译：

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用于面积和节能的可重构计算的模拟忆阻 CAM

基于存储器的可重构计算在逻辑功能密度方面超越传统 FPGA，并且受可编程互连的影响较小。然而，主要缺点是面积和功耗开销很大，而且在高密度、高性能的基于内存的计算 (MBC) 设备中，情况变得更糟。在本简报中，我们研究了使用模拟忆阻 CAM 来提高 MBC 的面积密度，从而实现更密集的存储器和更小的功耗。模拟结果表明显着的面积和能源节省，高达 $2.2\times $ 和 $2.6\times $ 分别与非易失性对应物相比，代价是延迟增加了 20%。