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Performance Analyses of Planar Schottky Barrier MOSFETs with Dual Silicide Layers at Source/Drain on Bulk Substrates and Material Studies of ErSi x /CoSi 2 /Si Stack Interface
Chinese Physics Letters ( IF 3.5 ) Pub Date : 2020-03-13 , DOI: 10.1088/0256-307x/37/3/038501
Bin Wang , Hao-Yu Kong , Lei Sun

A dual silicide layer structure is proposed for Schottky barrier metal-oxide-semiconductor field effect transistors (MOSFETs) on bulk substrates. The source/drain regions are designed to be composed with dual stacked silicide layers, forming different barrier heights to silicon channel. Performance comparisons between the dual barrier structure and the single barrier structure are carried out with numerical simulations. It is found that the dual barrier structure has significant advantages over the single barrier structure because the drive current and leakage current of the dual barrier structure can be modulated. Furthermore, the dual barrier structure’s performance is nearly insensitive to the total silicide thickness, which can relax the fabrication requirements and even make an SOI substrate unnecessary for planar device design. The formation of ErSi x /CoSi 2 stacked multilayers has been proved by experiments .

中文翻译:

块状衬底上源极/漏极处具有双硅化物层的平面肖特基势垒MOSFET的性能分析和ErSi x / CoSi 2 / Si堆叠界面的材料研究

针对块状衬底上的肖特基势垒金属氧化物半导体场效应晶体管(MOSFET),提出了一种双硅化物层结构。源/漏区设计为由双层硅化物层组成,对硅沟道形成不同的势垒高度。通过数值模拟对双势垒结构和单势垒结构之间的性能进行了比较。发现双势垒结构比单势垒结构具有显着的优势,因为可以调制双势垒结构的驱动电流和泄漏电流。此外,双势垒结构的性能对总硅化物厚度几乎不敏感,这可以放松制造要求,甚至使平面器件设计不需要SOI衬底。
更新日期:2020-04-18
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