The impact of channel flattening process, dozen digital etching (DDE), which is several dozen cyclic treatments of plasma oxidation and oxide wet etching, on device performance and reliability of Ge(1 0 0) nMOSFETs has been systematically investigated. It was found that DDE improves not only electron mobility but also Positive Bias Temperature Instability (PBTI). The PBTI degradation was found related to the pre-existing bulk traps inside gate stack instead of interfacial traps generation. DDE is considered a promising technique for constructing ultra-scaled Ge 3D channel architecture such as nanowire or nanosheet for high performance CMOS devices.

已经系统地研究了沟道平坦化工艺，数十种数字蚀刻（DDE）（即等离子体氧化和氧化物湿法蚀刻的数十种循环处理）对Ge（1 0 0）n MOSFET器件性能和可靠性的影响。发现DDE不仅改善了电子迁移率，而且还改善了正偏置温度不稳定性（PBTI）。发现PBTI降解与门叠层内部预先存在的大量陷阱有关，而不是与界面陷阱的产生有关。DDE被认为是一种用于构建超大规模Ge 3D通道架构（如用于高性能CMOS器件的纳米线或纳米片）的有前途的技术。