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Behavior of gold-doped silicon substrate under small- and large-RF signal
Solid-State Electronics ( IF 1.7 ) Pub Date : 2019-11-27 , DOI: 10.1016/j.sse.2019.107718
Massinissa Nabet , Martin Rack , Nur Zatil Ismah Hashim , C.H. (Kees) de Groot , Jean-Pierre Raskin

In this paper, small- and large-signal performances of passive devices integrated on high-resistivity, trap-rich and gold-doped silicon wafers are presented and compared through measurements and simulations. The gold-doped silicon substrate was produced starting from standard silicon having a nominal resistivity of 56 Ω·cm. We show that the gold-doped substrate presents high effective resistivity and low losses suitable for RF applications. This has been demonstrated by measuring coplanar waveguides, crosstalk, inductors and band pass filter where we observed similar performances for small-signal measurements compared with trap-rich substrate. Large-signal measurements of gold-doped substrates show 60 dBm lower harmonic distortion than high-resistivity substrates, and 10 dB lower than trap-rich substrate at 0 V DC bias. However, a large DC bias dependence on the harmonic distortion induced by the gold-doped substrate is observed. This unexpected behavior is explained using the Fermi level localization in the silicon bandgap for the different DC bias conditions.



中文翻译:

金掺杂硅衬底在小和大射频信号下的行为

本文介绍了集成在高电阻率,富陷阱和金掺杂硅晶片上的无源器件的小信号和大信号性能,并通过测量和仿真进行了比较。从标称电阻率为56的标准硅开始生产金掺杂的硅衬底Ω·厘米。我们表明,掺金衬底呈现出适用于RF应用的高有效电阻率和低损耗。通过测量共面波导,串扰,电感器和带通滤波器已证明了这一点,与富陷阱衬底相比,在小信号测量中我们观察到了类似的性能。掺金衬底的大信号测量结果显示,在0 V DC偏置下,谐波失真比高电阻率衬底低60 dBm,比富陷阱衬底低10 dB。然而,观察到对由金掺杂衬底引起的谐波失真的大的DC偏置依赖性。对于不同的直流偏置条件,使用硅带隙中的费米能级定位来解释这种意外行为。

更新日期:2019-11-27
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