This work presents statistical measurements on the effects of the electrostatic coupling on the on-current, off-current and low frequency noise characteristics of individual top-tier devices, due to bottom-tier devices being biased. No inter-tier coupling impact was observed on device low-frequency noise regardless the transistor area. While for analog applications the coupling-induced ΔV_t, ΔI_off and ΔI_on might reach high values, it is demonstrated that regarding digital applications, the coupling-induced fluctuations are well below the mismatch effects. TCAD and SPICE simulations were used to fully understand the phenomenon, to predict the effects at SRAM bitcell level and to propose guidelines to contain the inter-tier electrostatic coupling: the coupling effect can be limited either by increasing the Inter-Layer Dielectric (ILD) thickness or through a top/bottom transistor misalignment.

这项工作提出了有关静电耦合对由于底层设备偏置而导致的各个顶层设备的导通电流，截止电流和低频噪声特性的影响的统计测量结果。不论晶体管面积如何，都没有观察到层间耦合对器件低频噪声的影响。而对于模拟应用的耦合引起的ΔV_吨，ΔI_关闭和ΔI_上可能达到较高的值，这表明对于数字应用，耦合引起的波动远低于失配效应。TCAD和SPICE仿真被用来充分理解该现象，预测SRAM位单元级别的影响并提出包含层间静电耦合的准则：可以通过增加层间电介质（ILD）来限制耦合效应厚度或顶部/底部晶体管未对准。