Abstract In this manuscript, a compact model of source depletion, drain depletion and channel potential in the charge plasma based Tunnel Field Effect Transistor (U-CPBTFET) with two underlap regions (source-gate and gate-drain) is proposed and developed. The shift in potential due to variation in length of gate underlap regions has been studied and authenticated with TCAD simulation results by operating proposed device in various biasing condition. The surface potential model is derived by splitting the silicon substrate into seven different regions (including source and drain depleted regions) and resolving the pseudo-2-D Poisson's equation (PE) in the above mentioned locales. Parabolic approximation method is applied to solve the PEs at different boundary conditions. The impact of parametric variation such as spacer length and channel material has been investigated on the basis of electrical attributes of U-CPBTFET.

中文翻译：

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基于电荷等离子体的隧道场效应晶体管的分析建模与栅极重叠区的影响

摘要 在本手稿中，提出并开发了一种基于电荷等离子体的隧道场效应晶体管 (U-CPBTFET) 中源极耗尽、漏极耗尽和沟道电位的紧凑模型，该晶体管具有两个下重叠区域（源极-栅极和栅极-漏极）。通过在各种偏置条件下操作所提出的器件，已经研究了由于栅极重叠区域长度变化而导致的电位变化，并通过 TCAD 模拟结果进行了验证。表面电位模型是通过将硅衬底分成七个不同的区域（包括源极和漏极耗尽区）并在上述区域解析伪二维泊松方程 (PE) 来推导出来的。应用抛物线逼近方法求解不同边界条件下的PE。