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Trap Analysis Based on Low-frequency Noise for SiC power MOSFETs under Repetitive Short-Circuit Stress
IEEE Journal of the Electron Devices Society ( IF 2.3 ) Pub Date : 2020-01-01 , DOI: 10.1109/jeds.2020.2971245
J. L. Wang , Y. Q. Chen , J. T. Feng , X. B. Xu , Y. F. En , B. Hou , R. Gao , Y. Chen , Y. Huang , K. W. Geng

In this paper, the degradation behavior of the electrical characteristics was investigated, and trap analysis based on low-frequency noise (LFN) was carried out for the commercial 1.2-kV /30-A silicon carbide (SiC) power MOSFETs under repetitive short-circuit (SC) stress. The experiment results show that the on-state resistance ( ${R} _{\mathrm{ dson}}$ ) and threshold voltage ( ${V} _{\mathrm{ th}}$ ) increase significantly. Meanwhile, the drain-source current ( ${I} _{\mathrm{ ds}}$ ) decreases obviously with the increase of the SC cycles. Furthermore, the gate-source leakage current ( ${I} _{\mathrm{ gss}}$ ) of the SiC power MOSFETs increase greatly and the blocking characteristics deteriorated after 1000 SC cycles. The positive shift was observed on the gate-capacitance versus gate-voltage ( ${C} _{\mathrm{ g}}$ - ${V} _{\mathrm{ g}}$ ) curve, which shows that the damage region could be in channel along the SiC/SiO2 interface after repetitive SC stress. In order to obtain the trap information, trap characterization was performed by using LFN method, and the LFN results show that the trap density increases with the SC cycles. The physical mechanism could be attributed to electrically active traps generated at SiC/SiO2 interface and oxide layer due to the peak ionization rate, the perpendicular electrical field and high temperature during SC stress. The study may be useful to provide reference for converters design and fault protection of SiC power MOSFETs.

中文翻译:

基于低频噪声的 SiC 功率 MOSFET 在重复短路应力下的陷阱分析

本文研究了电特性的退化行为,并对商用 1.2-kV /30-A 碳化硅 (SiC) 功率 MOSFET 在重复短路条件下进行了基于低频噪声 (LFN) 的陷阱分析。电路 (SC) 应力。实验结果表明,通态电阻 ( ${R} _{\mathrm{ dson}}$ ) 和阈值电压 ( ${V} _{\mathrm{ th}}$ ) 显着增加。同时,漏源电流( ${I} _{\mathrm{ ds}}$ ) 随着 SC 周期的增加而明显降低。此外,栅源漏电流( ${I} _{\mathrm{ gss}}$ ) 的 SiC 功率 MOSFET 大大增加,并且在 1000 个 SC 循环后阻断特性恶化。在栅极电容与栅极电压之间观察到正偏移( ${C} _{\mathrm{ g}}$ —— ${V} _{\mathrm{ g}}$ ) 曲线,表明在重复 SC 应力后,损伤区域可能位于沿 SiC/SiO 2界面的沟道中。为了获得陷阱信息,使用LFN方法进行陷阱表征,LFN结果表明陷阱密度随着SC循环而增加。物理机制可归因于由于峰值电离率、垂直电场和 SC 应力期间的高温在SiC/SiO 2界面和氧化物层上产生的电活性陷阱。该研究可为SiC功率MOSFET的转换器设计和故障保护提供参考。
更新日期:2020-01-01
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