This paper proposed the design of n-bit controllable inverter using reversible logic and implementation based on QCA. The proposed inverter is designed by cascading Feynman gates. Conventional technology based implementation cost, i.e., quantum cost is compared with QCA based implementation cost. This comparative study shows the cost effective implementation in QCA. Besides n-bit controllable inverter, the design of 2-bit double controllable inverter is also proposed using Feynman gate and is implemented using QCA. The evaluation of those designs are performed using parameters like the number of QCA cells, majority voters, inverters, areas, clocking zones and circuit cost. The simulation output is evaluated based on theoretical values which established that all the circuits are functioning accurately. The proposed CNOT gate is superior in cell count and device area. The designs have less area-delay cost than conventional design. The stuck-at-fault analysis of those proposed inverters is performed and to achieve 100% fault coverage of proposed circuits, a set of test vector has been proposed. The proposed circuits can be used as a basic component for more powerful low energy dissipated nano-scale reversible adder/subtractor circuit.

本文提出了采用可逆逻辑的n位可控逆变器的设计和基于QCA的实现。所提出的逆变器是通过级联费曼门设计的。将基于传统技术的实施成本（即量子成本）与基于QCA的实施成本进行比较。这项比较研究表明，在QCA中实施具有成本效益的方法。除n位可控逆变器外，还提出了采用费曼门的2位双控逆变器设计，并采用QCA进行设计。使用诸如QCA单元数，多数投票者，逆变器，面积，时钟区域和电路成本之类的参数对这些设计进行评估。仿真输出是基于理论值进行评估的，该理论值确定所有电路都可以正常工作。所提出的CNOT门在单元数和器件面积方面具有优势。与传统设计相比，这些设计的面积延迟成本更低。对这些拟议的逆变器进行故障锁定分析，并为实现拟议电路的100％故障覆盖率，已提出了一组测试矢量。所提出的电路可用作更强大的低功耗纳米级可逆加法器/减法器电路的基本组件。