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Device-aware inference operations in SONOS nonvolatile memory arrays
arXiv - CS - Neural and Evolutionary Computing Pub Date : 2020-04-02 , DOI: arxiv-2004.00802
Christopher H. Bennett, T. Patrick Xiao, Ryan Dellana, Vineet Agrawal, Ben Feinberg, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, and Matthew J. Marinella

Non-volatile memory arrays can deploy pre-trained neural network models for edge inference. However, these systems are affected by device-level noise and retention issues. Here, we examine damage caused by these effects, introduce a mitigation strategy, and demonstrate its use in fabricated array of SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) devices. On MNIST, fashion-MNIST, and CIFAR-10 tasks, our approach increases resilience to synaptic noise and drift. We also show strong performance can be realized with ADCs of 5-8 bits precision.

中文翻译:

SONOS 非易失性存储器阵列中的设备感知推理操作

非易失性存储器阵列可以部署预训练的神经网络模型进行边缘推理。但是,这些系统会受到设备级噪声和保留问题的影响。在这里,我们研究了这些效应造成的损害,介绍了一种缓解策略,并展示了其在 SONOS(硅-氧化物-氮化物-氧化物-硅)器件制造阵列中的使用。在 MNIST、fashion-MNIST 和 CIFAR-10 任务上,我们的方法增加了对突触噪声和漂移的弹性。我们还展示了使用 5-8 位精度的 ADC 可以实现强大的性能。
更新日期:2020-04-03
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