This paper presents implementation friendly VLSI-algorithms for maximum-eigenvalue-detection (MED), energy with minimum-eigenvalue (EME), and mean-to-square extreme-eigenvalue (MSEE) based blind spectrum sensing algorithms. We propose to use efficient iterative power-method for computing maximum and minimum eigenvalues for these algorithms that complemented our hardware design. New VLSI architectures based on suggested spectrum sensing algorithms have been presented in this work. We present two types of sensor architectures: (1) memory-less & low-latency (2) memory-based & resource-shared spectrum-sensor architectures. Former type targets to achieve lower sensing time with adequate hardware efficiency and the later ones are highly resource shared to consume lesser hardware with moderate sensing time. Performance analyses of suggested MED, MSEE and EME spectrum sensing algorithms in AWGN environment showed that the detection probability of 0.75 could be achieved at the SNRs of −12 dB, −10 dB and −7 dB respectively. On synthesizing and post-layout simulating our sensor architectures in 90 nm-CMOS process with the supply of 1.2 V, they could operate at the maximum clock frequency up to 408 MHz delivering sensing time in the range of $23- 44\,\,\mu \text{s}$ . The proposed spectrum sensors have achieved $5.5\times $ and $19\times $ better sensing time and hardware efficiency, respectively, compared to the state-of-the-art implementations. Eventually, the memory-based spectrum sensors are FPGA prototyped and tested, at 100 MHz clock frequency, in DVB-T signal environment with OFDM modulated transmitted signals in 2K size IFFT-mode.

中文翻译：

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用于认知无线电网络的快速传感时间和硬件高效的基于特征值的盲谱传感器

本文提出了用于最大特征值检测 (MED)、具有最小特征值的能量 (EME) 和均方极值特征值 (MSEE) 的基于盲频谱感知算法的实现友好的 VLSI 算法。我们建议使用高效的迭代幂方法来计算这些算法的最大和最小特征值，以补充我们的硬件设计。在这项工作中已经提出了基于建议的频谱感知算法的新 VLSI 架构。我们提出了两种类型的传感器架构：（1）无内存和低延迟（2）基于内存和资源共享的频谱传感器架构。前一种类型的目标是在具有足够硬件效率的情况下实现较低的传感时间，而后者则是高度资源共享以消耗较少的硬件而具有适度的传感时间。建议 MED 的性能分析，AWGN 环境下的 MSEE 和 EME 频谱感知算法表明，在 -12 dB、-10 dB 和 -7 dB 的 SNR 下，可以实现 0.75 的检测概率。在 90 nm-CMOS 工艺和 1.2 V 电源下合成和布局后模拟我们的传感器架构时，它们可以在高达 408 MHz 的最大时钟频率下运行，提供范围内的传感时间 $23- 44\,\,\mu \text{s}$ . 所提出的光谱传感器已经实现 $5.5\times $ 和 $19\times $ 与最先进的实现相比，分别具有更好的传感时间和硬件效率。最后，基于存储器的频谱传感器在 100 MHz 时钟频率下进行 FPGA 原型设计和测试，在 DVB-T 信号环境中使用 2K 大小 IFFT 模式的 OFDM 调制传输信号。