A novel injection-locked phase locked loop (IL-PLL) with low spur and low phase noise is presented in this paper, in which self-feedback injection locked ring oscillator (SFIL-RO) and pseudo-random injection locked technique (PRILT) are presented. SFIL-RO, of which the oscillation signal is feedback to the input of the pulse generator to generate injection pulse, is proposed to achieve inherently aligned injection timing to decrease the injection spur. Meanwhile, it avoids the risk of suffering from pseudo-locking phenomenon, enhancing the immunity to the PVT variation. The periodicity of conventional injection behavior is broken in proposed PRILT, which essentially reduces the spur. The actual output of the IL-PLL with PRILT is the pseudo-random edge combination of two SFIL-ROs. Thus, the equivalent injection pulse is aperiodic. Calibration circuit is included to cope with the mismatch between two SFIL-ROs. To demonstrate the effectiveness of the proposed SFIL-RO and PRILT on optimizing spur, an IL-PLL was fabricated in SMIC 180 nm CMOS process. Measurement results show the best spur of −67.2 dBc and the RMS jitter of 124 fs are achieved when SFIL-RO and PRILT are activated. The core area was 0.142 mm2 and the power consumption is 6.1 mW from 1.8 V supply voltage.

中文翻译：

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具有自反馈注入锁定 RO 和伪随机注入锁定技术的低杂散和本征对齐 IL-PLL

本文提出了一种具有低杂散和低相位噪声的新型注入锁定锁相环（IL-PLL），其中自反馈注入锁定环形振荡器（SFIL-RO）和伪随机注入锁定技术（PRILT）被提出。SFIL-RO，其振荡信号反馈到脉冲发生器的输入以产生喷射脉冲，被提出来实现固有的对齐喷射正时以减少喷射杂波。同时，它避免了遭受伪锁定现象的风险，增强了对 PVT 变异的免疫力。拟议的 PRILT 打破了传统喷射行为的周期性，这从本质上减少了杂散。带有 PRILT 的 IL-PLL 的实际输出是两个 SFIL-RO 的伪随机边沿组合。因此，等效喷射脉冲是非周期性的。包含校准电路以应对两个 SFIL-RO 之间的不匹配。为了证明所提出的 SFIL-RO 和 PRILT 在优化杂散方面的有效性，在 SMIC 180 nm CMOS 工艺中制造了一个 IL-PLL。测量结果显示，当激活 SFIL-RO 和 PRILT 时，实现了 -67.2 dBc 的最佳杂散和 124 fs 的 RMS 抖动。核心面积为 0.142 mm2，1.8 V 电源电压下的功耗为 6.1 mW。