A fully integrated sub-terahertz (sub-THz) frequency synthesizer is proposed cascading a radio frequency subsampling phase-locked loop (SS-PLL) with millimeter-wave injection-locked frequency multipliers (ILFMs) and a sub-THz mixer for frequency extension. Enhanced third-harmonic and fourth-harmonic-extraction techniques are proposed for the ILFMs with different multiplication ratios. In addition, a frequency-tracking loop (FTL) with automatic frequency and amplitude calibration is embedded for the ILFMs. Finally, a distributed bias technique is employed to improve the linearity of the wideband magnetic-tuning sub-THz oscillator. Designed in a 65-nm CMOS process, the proposed prototype achieves an ultra-wide frequency tuning range from 61.2 to 100.8, 122.4 to 136.8, and 198.5 to 273.6 GHz with a phase noise at 1-MHz offset from −79.3 to −95.4 dBc/Hz and an integrated jitter from 124 to 159 fs over the tuning range. The synthesizer occupies a core area of 0.58 mm2 and measures an output power of −11 dBm at 211.4 GHz with 49.5 mW, corresponding to a dc-to-radio frequency (RF) efficiency of 0.16%, an FoM from −171.4 to −177.7 dBc/Hz, and ${\mathrm {FoM}}_{T}$ from −177 to −190.5 dBc/Hz.

中文翻译：

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在 65-nm CMOS 中具有频率跟踪环路的完全集成的 0.27-THz 注入锁定频率合成器

提出了一种完全集成的亚太赫兹 (sub-THz) 频率合成器，将射频子采样锁相环 (SS-PLL) 与毫米波注入锁定倍频器 (ILFM) 和用于频率扩展的亚太赫兹混频器级联. 针对具有不同倍增比的 ILFM，提出了增强的三次谐波和四次谐波提取技术。此外，ILFM 还嵌入了具有自动频率和幅度校准功能的频率跟踪回路 (FTL)。最后，采用分布式偏置技术来提高宽带磁调谐亚太赫兹振荡器的线性度。该原型采用 65 纳米 CMOS 工艺设计，实现了 61.2 至 100.8、122.4 至 136.8 和 198.5 至 273.6 GHz 的超宽频率调谐范围，相位噪声为 1MHz，偏移范围为 -79.3 至 -95。4 dBc/Hz 和在调谐范围内 124 至 159 fs 的综合抖动。合成器占用的核心面积为 0.58 mm2，在 211.4 GHz 下测量的输出功率为 -11 dBm，功率为 49.5 mW，对应于 0.16% 的直流到射频 (RF) 效率，FoM 为 -171.4 至 -177.7 dBc/Hz 和 ${\mathrm {FoM}}_{T}$ 从 -177 到 -190.5 dBc/Hz。