Considering the propagation delay, dVSW/dt immunity, and power dissipation issues in the bootstrapped high-side gate driver design, a monolithic high-voltage dc–dc buck converter with a high-speed dynamic level shifter and improved gate drive buffer is presented in this article. With the introduction of instantaneous dynamic current, the propagation delay of the level shifter is reduced to 1.13 ns for the high-side switch. The dVSW/dt immunity is enhanced by a dynamic current compensation during positive slewing and a diode voltage clamp during negative slewing. The average current consumption of the level shifter is only 8.45 μA at a switching frequency of 1 MHz. The proposed gate drive buffer eliminates the shoot-through current with the use of dead-time control. The compact level shifter and buffer are also used to drive an integrated p-channel mosfet transistor serving as a bootstrap diode emulator. Experimental results show that the fabricated converter with the proposed scheme regulates well with an 18 V input, 1.05 V output, and 2 A load current. Also, high efficiency of up to 93% is achieved.

中文翻译：

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具有动态电平转换器的高压 DC-DC 降压转换器，用于自举高端栅极驱动器和二极管仿真器

考虑到自举高侧栅极驱动器设计中的传播延迟、dVSW/dt 抗扰度和功耗问题，具有高速动态电平转换器和改进的栅极驱动缓冲器的单片高压 DC-DC 降压转换器在本文。随着瞬时动态电流的引入，高侧开关的电平转换器的传播延迟减少到 1.13 ns。通过正向转换期间的动态电流补偿和负转换期间的二极管电压钳位增强了 dVSW/dt 抗扰度。在 1 MHz 的开关频率下，电平转换器的平均电流消耗仅为 8.45 μA。建议的栅极驱动缓冲器通过使用死区时间控制来消除直通电流。紧凑型电平转换器和缓冲器还用于驱动用作自举二极管仿真器的集成 p 沟道 mosfet 晶体管。实验结果表明，采用所提出方案制造的转换器在 18 V 输入、1.05 V 输出和 2 A 负载电流下调节良好。此外，实现了高达 93% 的高效率。