In this article, an efficient technique is introduced to extract the quantization noise of a multi-phase voltage-controlled oscillator (VCO)-based quantizer (VCOQ) in the time domain as a pulsewidth modulated (PWM) signal. Using this technique, a new highly linear VCO-based 1-1 multi-stage noise shaping (MASH) delta–sigma analog-to-digital converter (ADC) structure is presented. This architecture does not require any operational transconductance amplifier (OTA)-based analog integrators or power-hungry linearization methods. The first stage is a closed-loop multi-phase VCO-based voltage-to-phase (V-to-P) converter, and the second stage is an open-loop multi-phase VCO-based voltage-to-frequency (V-to-F) converter. Using the proposed technique, the phase quantization error of the first stage is extracted as a pulse signal and then fed to the second stage. The input of the first VCO is a very small amplitude signal, and the input of the second VCO is a two-level PWM signal. Therefore, the VCO non-linearity does not limit the overall ADC performance, mitigating the need for power-hungry linearization methods. The prototype achieves second-order noise shaping with a DR/SFDR/SNR/SNDR of 82.7/88.7/80.3/79.7 dB for an input signal BW of 2 MHz. The fabricated design consumes 1.248 mW from a 0.9-V supply.

中文翻译：

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具有高效相位量化噪声提取技术的高线性 OTA-Less 1-1 MASH 基于 VCO 的 ΔΣ ADC

在本文中，介绍了一种有效的技术来提取时域中基于多相压控振荡器 (VCO) 的量化器 (VCOQ) 的量化噪声作为脉宽调制 (PWM) 信号。使用这种技术，提出了一种新的基于高度线性 VCO 的 1-1 多级噪声整形 (MASH) Δ-Σ 模数转换器 (ADC) 结构。这种架构不需要任何基于运算跨导放大器 (OTA) 的模拟积分器或耗电的线性化方法。第一级是基于闭环多相 VCO 的电压-相位 (V-to-P) 转换器，第二级是基于开环多相 VCO 的电压-频率 (V -to-F) 转换器。使用所提出的技术，第一级的相位量化误差被提取为脉冲信号，然后馈送到第二级。第一个VCO的输入是一个幅度很小的信号，第二个VCO的输入是一个双电平PWM信号。因此，VCO 非线性不会限制整体 ADC 性能，从而减少对耗电线性化方法的需求。对于 2 MHz 的输入信号带宽，原型实现了二阶噪声整形，DR/SFDR/SNR/SNDR 为 82.7/88.7/80.3/79.7 dB。制造的设计从 0.9V 电源消耗 1.248 mW。对于 2 MHz 的输入信号带宽，原型实现了二阶噪声整形，DR/SFDR/SNR/SNDR 为 82.7/88.7/80.3/79.7 dB。制造的设计从 0.9V 电源消耗 1.248 mW。对于 2 MHz 的输入信号带宽，原型实现了二阶噪声整形，DR/SFDR/SNR/SNDR 为 82.7/88.7/80.3/79.7 dB。制造的设计从 0.9V 电源消耗 1.248 mW。