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Efficient VLSI Architecture for 16-Point Discrete Cosine Transform
Proceedings of the National Academy of Sciences, India Section A: Physical Sciences ( IF 0.9 ) Pub Date : 2018-09-20 , DOI: 10.1007/s40010-018-0541-3
M. Thiruveni , D. Shanthi

The Discrete Cosine Transform (DCT) is an important transform in image and video processing systems. The perception of human visualization permits us to be numerically approximate rather than exact with slight compromise in accuracy. In this paper, we have proposed a digital implementation of 16-point approximate DCT architecture based on Modified Gate Diffusion Input (MGDI) technique. The 8-point DCT architecture can be realized in digital Very Large Scale Integration (VLSI) hardware with only 12 additions. The proposed 8-transistor MGDI full adder is used instead of existing 10-transistor MGDI full adder in the DCT architecture. It results in reduced circuit complexity, power and delay. Approximate multiplier-free MGDI DCT is simulated in Tanner SPICE for 90-nm CMOS process technology at 100 MHz. The simulation result shows that 20%, 16% and 7% of area, power and delay are reduced, respectively, when compared with approximate DCT by using 14 additions. The performance was evaluated based on peak signal-to-noise ratio (PSNR), and the proposed architecture shows enhancement in terms of hardware complexity, regularity and modularity with a little compromise in accuracy.

中文翻译:

适用于16点离散余弦变换的高效VLSI架构

离散余弦变换(DCT)是图像和视频处理系统中的重要变换。人类可视化的感知使我们可以在数值上近似而不是精确,而准确性略有下降。在本文中,我们提出了一种基于改进的门扩散输入(MGDI)技术的16点近似DCT架构的数字实现。仅需增加12个点,就可以在数字超大规模集成(VLSI)硬件中实现8点DCT架构。使用建议的8晶体管MGDI全加法器代替了DCT架构中现有的10晶体管MGDI全加法器。这样可以降低电路的复杂性,功耗和延迟。在Tanner SPICE中针对100 nm处的90 nm CMOS工艺技术模拟了近似无倍增的MGDI DCT。仿真结果表明20%与使用14种添加的近似DCT相比,面积,功率和延迟分别减少了16%和7%。该性能是根据峰值信噪比(PSNR)进行评估的,所提出的体系结构在硬件复杂性,规则性和模块化方面均表现出增强,但准确性有所降低。
更新日期:2018-09-20
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