The hetero-gate dielectric (HGD) structure was recently experimentally demonstrated to enhance the electrical performance of tunnel field-effect transistors (TFETs). This study examined the mechanisms underlying the HGD structure functioning and investigated the design of the structure to enhance the electrical characteristics of TFETs with different ratios of low- and high-k equivalent oxide thicknesses (EOT). The on-current enhancement by the source-side dielectric heterojunction, which directly modulates the on-state tunnel width, was much larger than that by the drain-side dielectric heterojunction, which indirectly affects the on-current by modulating the subthreshold tunnel width. The subthreshold swing is improved by the formation of a conduction band well near the source-channel junction. However, the swing improvement is limited by the hump effect when this local potential well approaches the source. The optimal design of the HGD structure and the maximal enhancement of on-current considerably depend on the EOT ratio of low- and high-k dielectrics. The on-current is most enhanced by the optimized HGD structure at a low/high-k EOT ratio of ten times, that is, approximately 160% of the on-current of the uniform high-k TFET counterpart. Due to the continuous trend of increasing the k-values or scaling EOTs, understanding the dependence of device physics and design on the low/high-k EOT ratio is crucial to optimize the performance of HGD-TFETs.

中文翻译：

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具有不同低/高-k EOT比的异质栅介质隧道场效应晶体管的器件物理和设计

最近实验证明了异质栅电介质 (HGD) 结构可以增强隧道场效应晶体管 (TFET) 的电气性能。该研究检查了 HGD 结构功能的基本机制，并研究了结构设计以增强具有不同低和高 k 等效氧化物厚度 (EOT) 比率的 TFET 的电气特性。源极侧介电异质结直接调节导通隧道宽度，其导通电流增强远大于漏极侧介电异质结，后者通过调节亚阈值隧道宽度间接影响导通电流。通过在源极-沟道结附近形成导带阱来改善亚阈值摆动。然而，当这个局部势阱接近源时，摆动改善受到驼峰效应的限制。HGD 结构的优化设计和导通电流的最大增强在很大程度上取决于低 k 和高 k 电介质的 EOT 比。优化的 HGD 结构以十倍的低/高 k EOT 比最大增强了导通电流，即均匀高 k TFET 对应物导通电流的大约 160%。由于增加 k 值或缩放 EOT 的持续趋势，了解器件物理和设计对低/高 k EOT 比率的依赖性对于优化 HGD-TFET 的性能至关重要。HGD 结构的优化设计和导通电流的最大增强在很大程度上取决于低 k 和高 k 电介质的 EOT 比。优化的 HGD 结构以十倍的低/高 k EOT 比最大增强了导通电流，即均匀高 k TFET 对应物导通电流的大约 160%。由于增加 k 值或缩放 EOT 的持续趋势，了解器件物理和设计对低/高 k EOT 比率的依赖性对于优化 HGD-TFET 的性能至关重要。HGD 结构的优化设计和导通电流的最大增强在很大程度上取决于低 k 和高 k 电介质的 EOT 比。优化的 HGD 结构以十倍的低/高 k EOT 比最大增强了导通电流，即均匀高 k TFET 对应物导通电流的大约 160%。由于增加 k 值或缩放 EOT 的持续趋势，了解器件物理和设计对低/高 k EOT 比率的依赖性对于优化 HGD-TFET 的性能至关重要。