Finite field arithmetic logic is central in the implementation of Reed-Solomon coders and in some cryptographic algorithms. There is a need for good multiplication and inversion algorithms that can be easily realized on VLSI chips. Massey and Omura [1] recently developed a new multiplication algorithm for Galois fields based on a normal basis representation. In this paper, a pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m). With the simple squaring property of the normal basis representation used together with this multiplier, a pipeline architecture is also developed for computing inverse elements in GF(2m). The designs developed for the Massey-Omura multiplier and the computation of inverse elements are regular, simple, expandable, and therefore, naturally suitable for VLSI implementation.

中文翻译：

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用于在 GF(2 ^m ) 中计算乘法和逆的 VLSI 架构

有限域算术逻辑在 Reed-Solomon 编码器和一些密码算法的实现中是核心。需要能够在 VLSI 芯片上轻松实现的良好乘法和求逆算法。Massey 和 Omura [1] 最近开发了一种新的基于正态基表示的伽罗瓦域乘法算法。在本文中，开发了一种管道结构来实现有限域 GF(2m) 中的 Massey-Omura 乘法器。通过与该乘法器一起使用的正规基表示的简单平方属性，还开发了一种流水线架构，用于计算 GF(2m) 中的逆元素。为 Massey-Omura 乘法器开发的设计和逆元素的计算是规则的、简单的、可扩展的，因此，自然适合 VLSI 实现。