Bridging the gap between surface physics and photonics

When light from the ambient environment interacts with the semiconductor, it may be either reflected or transmitted into the semiconductor. The refractive index is a crucial factor that affects the behavior of light at the interface between two media. For dielectric material with negligible magnetic interactions, the refractive index, n, is related to the dielectric constant (or permittivity), , of the material with the relation n = ^1/2, where is a function of wavelength. In the case of a semiconductor material, such as silicon, the refractive index is significantly higher than that of air or other ambient environments due to higher permittivity [51].

The behavior of light at the interface between two media with different refractive indices is governed by the Fresnel equations, which describe the amount of light that is reflected and transmitted as a function of the angle of incidence and the refractive indices of the two media [51]. The high refractive index difference between semiconductor and air causes a considerable amount of light to reflect back from the surface of the semiconductor, reducing the efficiency of the device.

To reduce reflection for solar cells and photodiodes, antireflection coatings (ARCs) [52–54] and surface texturing techniques [55–61] are designed. By carefully engineering the refractive index of the surface, the reflection can be minimized, allowing more light, particularly in the wavelength range of interest, to pass into the semiconductor material and be absorbed, resulting in higher device performance and new applications.

ARCs consist of dielectric thin films with specific thickness that exploit the interference effects of light [52, 53]. However, a single-layer ARC can only provide nearly zero reflection at a single wavelength and incidence angle. As illustrated in figures 2(a)–(c) [54], increasing the number of layers in the ARCs can lead to achieving almost complete reflection suppression over a wide range of wavelengths, but this also entails a rise in the intricacy of both the design and manufacturing processes (such as figure 2(a)).

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Surface texturing is the process of modifying the surface of materials to create specific structures, which can reduce reflection across a broad range of wavelengths. Surface texturing can be achieved by several methods, the choice of which depends on the type of material, the desired texture, and the production volume [55–57]. The interaction between the incident light and the surface texture depends on the size of the surface features relative to the incident wavelength. If the size of the surface features is much smaller than the incident wavelength, the surface appears optically smooth for the incident wavelength. However, if the size of the surface features is comparable to the incident wavelength, the surface appears rough, and the reflection is reduced by graded refractive index originated from the graded density profile between the air and the surface. As the size of the surface features are larger than the wavelength, the incident light can be trapped with increased optical path lengths during the multiple reflections between surface textures. Surface texturing also increases the acceptance angles for the incident light to semiconductors, as illustrated in figures 2(d)–(f) [59], which has resulted in a high performance Si-based solar cell [60] and photodiode [61]. In practical applications, minimizing the reflection is often achieved by a combination of surface texturing and ARCs that simultaneously act as surface passivation layers.

An emerging technique of light trapping is the use of plasmonic structures [52, 62–65]. These structures can trap and confine light through the plasmonic resonance effect, which arises from the interaction between the incident light and the free electrons in the metallic/non-metallic nanoparticles or nanoholes. Plasmonic structures can provide broadband and angle-independent light trapping [62–64], making them an attractive option for enhancing the performance of solar cells and photodiodes. Furthermore, plasmonic structures can be integrated with surface texturing and ARCs to create metamaterials with unique optical properties that cannot be achieved with conventional materials [65].

In addition to reducing reflection, spectral converters are another approach used to enhance light absorption in various applications. These converters can absorb light at one wavelength and emit it at another, allowing for better matching of the incident light to the absorption properties of the material. Luminescent downshifters [66] and upconverters [67] are examples of spectral converters that have been widely used to extend the absorption spectrum.

Light waveguides (figure 3) consisting of SiO₂/Si cladding-core structure on the silicon-on-insulator (SOI) wafers are used in low-loss optical transceivers for example [6–8, 68–73]. The SiO₂/Si interface have a high refraction-index change which is beneficial for the waveguides based on the total internal reflection of light at the interfaces. Furthermore a clean Si crystal is transparent to the telecom wavelengths of 1.3 and 1.6 μm. Obviously good synergy has been obtained here via the development of SOI technology in microelectronics because high crystal quality of Si core with a low density of impurities in the Si/SiO₂/Si wafer has decreased the light transmission losses. Yet, interface areas of the Si waveguide stripes on SiO₂ cause the optical losses via different phenomena. One loss mechanism arises from the Si interface roughness. The signal attenuation coefficient (dB cm⁻¹) is proportional to the square of roughness, specifically to the square of a standard deviation of the roughness [68, 69]. For low-loss waveguides, it is required very smooth waveguide sidewalls with the roughness less than 1 nm down to an atom layer thickness. Indeed, proper Si surface treatments such as the RCA-based wet chemical cleanining and oxidation of Si waveguide interfaces have been found to decrease the scattering loss [69, 70].

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In addition, the SiO₂/Si interfaces include point defects (e.g. broken dangling bond and impurities), which cause extra defect-induced electron levels in the Si band gap. The telecom infrared photons that are not able to excite the clean Si crystal through the direct electron transfer over the band gap can be now absorbed via the interface defect levels inside the gap (figure 3). This is one absorption way for the waveguide light. Another loss factor is related to the electrical carriers, electrons and holes. So-called free-carrier absorption is described with the Drude model of the electrical resistance where light is absorbed by the collective oscillation of the electric carriers along the light electric field, causing the resistive loss [71–74]. It is worth noting that the free carrier absorption, which is directly proportional to the density of the carriers, is relevant also to other photonic device components where high carrier concentrations appear, for example, in highly doped to n-type or p-type regions at metal/semiconductor contacts [73, 74].

Edge emitting laser diodes include both high and low reflective mirror structures fabricated on the cleaved semiconductor (110) sidewalls (figure 1(c)). These lasers suffer from the catastrophic optical mirror damages (COMDs) which limit the device lifetime [75–87]. When the temperature of a diode mirror increases locally (on area of micrometer scale) to a range of 100 °C–200 °C, the COMD phenomenon can occur, during which the mirror temperature increases rapidly even to 600 °C [83, 84]. That causes significant structural degradation leading to the laser malfunction (figure 4).

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Reasons for the initial temperature increase at the laser mirrors have been investigated for long. It is widely accepted that defect-induced gap levels at the cleaved diode surfaces play a key role behind the electron-transfer processes that finally lead to the local temperature increase. The band gap defect levels increase carriers' non-radiative recombination which increases the semiconductor temperature. On the other hand, the defect levels increase an opposite electron transfer via thermal generation of the carriers to the conduction band. Furthermore, the gap levels and the free carriers increase the laser light absorption and the resistive heating of the device material. These different electron-transfer processes are expected to increase and sustain each other in the presence of light absorption.

Thus, decreasing a density of the band-gap defect levels at the semiconductor mirror facets is crucial to increase the lasers lifetime. This requires understanding of different III–V(110) surfaces (section 3) because the area of a laser waveguide typically includes a heterostructure of different III–V films including quantum wells. The mirror structure often includes a stack of insulator and/or metal films. Recently it has been shown that cleaving the diode mirror facets in UHV environment followed by in-situ deposition of ZnSe passivation layers before air exposure on the facets increases the device lifetime [86].

Most photonic devices contain metal/semiconductor junctions to transmit the circuit current through a semiconductor part or out of it in the case of solar cells and photodiodes (figure 1). These interfaces have been traditionally categorized Ohmic or Schottky contact depending on how the semiconductor electronic bands bend near the interface. The band bending means the presence of an internal electric field (even without an external bias) inside the semiconductor, which originates from the electrons' transfer between a metal and semiconductor to align their Fermi levels according to the Volta contact potential rule. The band bending depends also on the doping type and is different for n-type and p-type crystals. However, at Ohmic interfaces, the band bending is such that semiconductor majority carriers accumulate close to the interface while at Schottky contacts, the majority carriers deplete, are repelled away from the interface [88–90].

Schottky contacts themselves have been utilized as a rectifier and a simple photodetector (e.g. in thermal imaging devices) [91–95] while Ohmic contacts are needed for many devices to transmit the electric current through a device p–n junction structure with a minimized resistance [88, 89, 96, 97]. Two parameters should be minimized in high-quality Ohmic contacts: contact resistivity and carrier recombination (or generation). Toward the first target, the n-type or p-type doping atom density needs to be maximized [98, 99], which on the other hand increases the harmful free-carrier absorption of light (section 2.2). The high doping typically increases also the density of point defects, which is further increased by interactions of metal atoms and a semiconductor. Therefore, the metal contact areas include an increased number of gap levels, which increase carriers' recombination. Thus in many photonic devices, the Ohmic contacts are a compromise between the efforts to increase the doping concentration and to decrease the density of defect levels. The third critical factor is durability of the Ohmic contacts. For example, degradation of the Ohmic contact of p-GaN decreases operation time of ultraviolet LED [100].

Furthermore, an additional factor increases the gap levels at metal contacts: metal-induced gap states (MIGS) which arises from extension of metal wavefunctions into a semiconductor side as shown in figure 5 [96]. To reduce MIGS effects, ultrathin insulator barriers are investigated for passivating the device contacts, which we will return to in section 4.5.

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As presented above, insulator/semiconductor interfaces guide the light propagation in applications. These interfaces also participate in guiding electric current; blocking the current transport into wrong places. For example, the light absorption induced electric carriers should be guided efficiently to the metal contacts in solar cells and photodetectors (figure 1), while in the LED the current transport along the mesa sidewalls should be suppressed to increase the radiative recombination in high-quality bulk quantum wells. The defect levels at insulator/semiconductor interfaces change significantly the carrier recombination and generation [101–103].

Any defects or impurities at the interface can increase the recombination of electric carriers and deplete minority carriers near the surface. The surface recombination velocity (${S_{{\text{eff}}}}$) is often used to specify the recombination at a surface of photonic devices. It can be determined by measuring the effective minority carrier lifetime. Assuming the front and rear surfaces have same properties, the ${S_{{\text{eff}}}}$ can be determined by

$$\begin{align}\frac{1}{{{\tau _{{\text{eff}}}}}} = \frac{1}{{{\tau _{{\text{bulk}}}}}} + \frac{{2{S_{{\text{eff}}}}}}{W},\end{align} \tag{ 1 }$$

where ${\tau _{{\text{eff}}}}$ is the effective carrier lifetime, ${\tau _{{\text{bulk}}}}$ is the carrier lifetime in the bulk, and W is the wafer thickness. Surface passivation can substantially reduce surface recombination by reducing the recombination either by decreasing the defect level density (chemical passivation) and/or electrostatically repelling the electric carriers from the interface by an internal electric field (field-effect passivation). The former passivation is quantified as the interfacial defect density (${D_{{\text{it}}}}$) while the latter as the fixed charge density (${Q_{{\text{tot}}}}$). Recombination can take place either in bulk or at the surface. When surface lifetime limits the effective carrier lifetime compared to the bulk lifetime (${\tau _{{\text{bulk}}}} \gg {\tau _{{\text{surf}}}}$), the bulk lifetime can be assumed to be infinite (${\tau _{{\text{bulk}}}} \to \infty$) and an upper limit for the surface recombination velocity (${S_{{\text{eff,max}}}}$) can be estimated by

$$\begin{align}{S_{{\text{eff,max}}}} \approx \frac{W}{{2{\tau _{{\text{eff}}}}}}.\end{align} \tag{ 2 }$$

Table 1 in appendix shows selected ${S_{{\text{eff,max}}}}$ values for different semiconductor interfaces. The surging demand for photovoltaic devices has spurred significant advancements in surface passivation technology for Si. Notably, the tunnel oxide passivating contact (TOPCon) technology has yielded remarkable outcomes, achieving an exceptionally high carrier lifetime reaching 500 ms (table 1), which translates to ${S_{{\text{eff,max}}}}$ dropping to less than 0.05 cm s⁻¹. When integrated with industrial processes, these parameters indicate a significant improvement in the energy conversion efficiency of solar panels. Similarly, recent breakthroughs of ${S_{{\text{eff,max}}}}$ as low as 1.3 cm s⁻¹ on n-type Ge through the optimization of SiO₂/Al₂O₃ passivation layers (table 1) are promising for Ge applications.

In addition to the interface defects, insulator/semiconductor junctions include the band-gap levels also in the insulator side (figure 6), for example, so-called border traps at distances of 1 nm from the interface [104–111]. Thus, the carriers can be lost through the non-radiative recombination at various gap levels. These levels can also cause an additional current channel. Moreover, the gap level also increase the opposite carrier transfer, thermal excitations which cause an increased dark (leakage) current in photodetectors. In many electronic devices based on the metal–oxide–semiconductor stack, the gap levels increase the leakage current through the oxide film as well, which is another type of the leakage; different from the diode dark current. Section 4.4 further describes potential solutions to decrease harmful recombination and generation in devices.

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Most solid surfaces experience structural changes (i.e. reconstruction or relaxation) after the surface cut or formation, as compared to the corresponding bulk plane structure, leading to changes in the surface electronic structure as well. The reconstruction means that a two-dimensional phase transition takes place on the surface, causing atomic rearrangements and a change in the surface lattice compared to the planar bulk lattice. In the relaxation, the surface lattice does not change but the atomic positions in the vertical (surface normal) direction change. The reconstruction trend is especially strong for the semiconductor crystals since their covalent bond orbitals typically have a strong angular dependence. This distinguishes semiconductors from metals, in which the bonds between metal ions are formed by a delocalized electron sea. If a semiconductor surface is produced by cleavage of a crystal in UHV, the atoms located on the surface lose one or more neighboring atoms (figure 7). Thus, the outermost atoms have half-filled dangling bonds, i.e. orbitals occupied with a single electron, in contrast to the bulk bonding orbitals with a pair of electrons. The existence of half-filled dangling bonds leads to a significant increase in the total energy of the cleaved crystal. It is therefore energetically favorable for the crystal to rearrange its atomic structure at the surface to minimize a number of the dangling bonds. Since rigid restrictions are imposed on the angles between localized orbitals in semiconductors, surface rearrangements usually lead to drastic changes in symmetry and unit cell size. Moreover, the rearrangement of surface atoms can involve also deeper atomic layers in addition to the uppermost layer. Ultimately, the equilibrium ground-state (i.e. minimum energy) structure is governed by a delicate balance of the energy gain from the elimination of dangling bonds and the energy cost caused by introduced lattice strain in a modified surface layer. Also, the changes in atomic surrounding require typically the modification of electrons' distribution which can cause an additional Coulombic interactions between charged structural elements.

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The most common building blocks of the reconstruction on Si and Ge surfaces are dimers and adatoms. The number of broken dangling bonds varies depending on the crystallographic direction of a cleavage plane defined by the Miller indexes (figure 7). On the bulk-plane terminated (111) and (110) faces, there is one dangling bond per the surface atom, while on the (100) surface, each atom has two dangling bonds if no reconstruction occurs.

Thus, it is natural that pairing of the surface atoms and formation of new bonds occur on the Si(100) surface to reduce the number of dangling bonds to half, lowering the material total energy significantly. The paired atoms, dimers, form linear rows and the (2 × 1) unit cell according to the Wood notation where the unit cell length is doubled along one primitive vector direction, as compared to the (1 × 1) bulk plane lattice. If no further structural change occurred, the dimer atoms would be equivalent and have one partly occupied dangling bond per atom. Such degeneracy causes Jahn–Teller distortion where the dimers spontaneously deform lowering their symmetry, as shown in figure 7(b). This leads to an additional decrease of energy. The Si dimer axis is tilted by 18 degree to the (100) surface plane leading to so-called buckled dimers [120]. This means that the Si dimer atoms lie at inequivalent positions, accompanied by electron charge transfer between the dimer-up and dimer-down atoms. Two orientations of the asymmetric dimers are possible, one tilt to the left and the other to the right. At room temperature or higher, rapid fluctuations between the two configurations (so-called flip motion) [121, 122] can occur for dimers continuously such that the dimer tilting does not necessarily appear in the measurement at room temperature, for example, when the surface is probed by scanning tunneling microscopy (STM) or electron diffraction (figures 8(a)–(c)). However, the asymmetric dimers provide a signal when the surface is probed by a fast measurement of the photoelectron spectroscopy that gives a 'snapshot' of tilted dimer configuration [117, 119]. The Si 2p core-level spectrum of Si(100)(2 × 1) surface shows two components: one related to the dimer-up (S_u) and the other related to dimer-down (S_d) atoms with the binding-energy separation of 0.5 eV as exemplified in figure 8(d).

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At low temperatures (<200 K), the flip motion of dimers slows down, which makes one of two tilted configurations frozen [122]. Moreover, dimers in adjacent rows are oriented in opposite directions, leading to c(4 × 2) and (2 × 2) unit cells (figure 8(h)). Similar structural changes are observed for the Ge(100) surface, and the (2 × 1), c(4 × 2), and (2 × 2) reconstructions form due to dimerization in the first layer of Ge atoms, depending on the temperature [123]. For instance, the tilting angle of Ge dimers (19 degree) is very similar to that of Si dimers [124].

Since the tilted dimer on the Si(100) and Ge(100) surfaces possess one fully occupied dangling bond and one completely empty dangling bond, a semiconducting electronic structure with a surface band gap is formed (figure 8(f)). For the Si(100) surface, a dominant feature in the valence band edge is a surface state D_up associated with the dangling-bond orbital of the dimer-up Si atoms [125]. Likewise, the dominant feature above the Fermi level is a surface state D_down associated with the dangling-bond orbital of the dimer-down Si atoms. Thus, the band gap of approximately of 0.5 eV (i.e. half of the bulk gap) at clean Si(100) is determined by the occupied and empty dangling-bond levels. At the Ge(100) surface, the electronic properties are complicated by a bulk contribution which is interconnected to the surface lattice via a surface resonance [126–129]. The Ge(100) surface resonance is one probable reason for that the n-type Ge(100) has strong Fermi level pinning at 0.1 eV above the valence band maximum [129, 130].

The Si(111) and Ge(111) surfaces, of which atom densities of 7.84 ‧ 10¹⁴ and 7.22 ‧ 10¹⁴ cm⁻², respectively, are higher than 6.78 ‧ 10¹⁴ cm⁻² of Si(100) and 6.24 ‧ 10¹⁴ cm⁻² of Ge(100), exhibit even a greater variety of reconstructions. The specific atomic structure depends on the method used in the preparation of clean surface. For example, the Si(111) surface cleaved in UHV at liquid nitrogen temperature (∼100 K) exhibits the (2 × 1) reconstruction. At 500–700 K it changes to the (7 × 7) reconstruction (figure 7). This phase transition is irreversible, i.e. the (7 × 7) structure persists even after lowering the temperature. At a higher temperature (∼1170 K) the (7 × 7) reconstruction transforms to another phase which is so-called high-temperature (1 × 1) structure. This phase transition is of order-disorder type and has a reversible character, i.e. lowering the temperature leads to the restoration of energetically stable (7 × 7) below 1170 K. It includes 12 atoms in the adatom layer, 42 atoms in the rest-atom layer, and 48 atoms in the layer containing the stacking fault [131]. Counting the atoms amount in the adatom and rest-atom layers, one can find that the (7 × 7) structure needs extra four Si atoms compared to the non-reconstructed Si(111)(1 × 1) surface with the bulk-like termination. From the energetic viewpoint, the benefit of (7 × 7) reconstruction is obvious, because it allows one to reduce the number of dangling bonds by more than two and half times, and thus, the Si(111)(7 × 7) is very stable. In contrast, the Ge(111) shows the c(2 × 8) reconstruction that includes adatoms and rest-atoms. The most detailed information about the electronic structures of Si(111) and Ge(111) reconstructions has been obtained for the (7 × 7) structure [132–134]. They include occupied and empty levels which are localized on the adatoms, the rest-atoms, and the adatom backbonds. The surface band contributed by the occupied dangling bonds of adatoms crosses the Fermi level (i.e. a metallic band structure), leading to Fermi level pinning at 0.7 eV above the valence band maximum for the both n-type and p-type Si(111) samples. Thus the surface work function is independent of the type and doping level of the Si(111)(7 × 7) surface [135].

The atomic structure on the (110) surfaces of Si and Ge is rather complicated and less understood still. When the Si(110) surface is annealed at 1200 °C, it exhibits a large (16 × 2) reconstruction [113, 138, 139]. The building blocks of this structure (figure 7(d)) are a buckled tetramer, heptagonal rings, and a tetragonal ring.

In contrast to Si(110) and Ge(110), III–V(110) surfaces are well understood (figure 9), and have provided a well-defined template for surface investigations during decades because clean III–V(110) surfaces can be readily obtained by cleaving cubic III–V crystals. It is worth noting that the cleaved III–V(110) surfaces have been used in the laser diode mirrors. III–V(110) surfaces are an exception because they do not typically reconstruct but have the (1 × 1) bulk-plane lattice according to the Wood definition. However, the surface relaxation occurs at III–V(110) together with electron transfer from the group-III dangling bond to group-V one. The resulting relaxed III–V(110) surface is semiconducting (or insulating) with a clear band gap of which size equals to the bulk band gap (figure 10). In other words, a clean III–V(110) surface does not cause extra electron levels in the middle of the bulk band gap, in contrast to Si(100)(2 × 1) or Si(111)(7 × 7). In fact, the band gap without surface-related electron levels is a rather common property among clean III–V surfaces where the group-V dangling bonds become filled by electrons while group-III dangling bonds are empty [140–144]. In contrast, intrinsic point defects like As substitutional in Ga site (As_Ga) cause the midgap levels in the clean surfaces [144].

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Many clean and crystalline III–V(100) and III–V(111) surfaces undergo strong structural rearrangements (figure 9), and the resulting reconstructions own large unit cells such as (2 × 4) or (6 × 6) or (4 × 2) [145–150]. The same reconstruction principles as for Si and Ge determine largely the structural changes at III–V surfaces also. The III–V reconstructions often extend to a depth of several atomic layers, exposing also the second and third atomic layers, as shown in figure 9. The strongly rearranged III–V(100) surfaces can be in fact expected to cause atomic scale non-uniformity at the interfaces grown on the top of the reconstruction. Thus, a proper adsorbate layer on a clean semiconductor surface might decrease the structural changes at the semiconductor side via the formation of smaller adsorbate-induced unit cell [151–153], and improve atomic-scale smoothness at the interfaces.

Wurtzite III–V nitride surfaces (figure 9(e)) such as GaN(0001) and AlGaN(0001) are an exception among semiconductor surfaces because their reconstructions are typically atomically smooth, which can be understood with strong nitrogen bonds which have partial ionic nature, which hinders the atomic rearrangement [137, 154–159]. In contrast, extra Ga layers have been found to form smooth islands with superstructures. Another peculiar property of III-N nitrides is that they exhibit a surface diffraction pattern without any surface cleaning even after a long air exposure of several months. Strong nitrogen bonds of course decrease the oxygen incorporation into the nitride surfaces but it appears also that the III–V nitride surfaces can accommodate oxygen atoms keeping crystalline nature in different way as compared to many other semiconductor surfaces [156–158].

Properties of wet-chemically treated Si, Ge, and III–V surfaces have attracted great interest for several decades because these surfaces are predominantly utilized in industrial processes [e.g. 160–180]. Thus, the semiconductor wet chemistry can be considered a very established area but on the other hand, it is also developed continuously toward sustainable solutions, which for example decrease consumption of chemicals. An obvious difference between the wet chemistry methods and UHV methods (section 3) is the environment of atmospheric pressures during the cleaning and transfer of samples.

Si crystals with the (111) surface orientation appear to be a surprising exception among the semiconductor surfaces because a very high-quality Si(111) surface structure has been observed in STM (figure 11) after a pure wet chemical treatment [169, 171]: Without any additional preparation, a proper F-containing wet etching provides large-scale smooth terraces with atomic scale ordering for hydrogen-terminated Si(111). In the optimized chemical treatment, 1.0% ammonium sulfite was included in the 40% NH₄F etching solution for removing dissolved oxygen and for preparing atomically smooth Si(111) [171].

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It is still surprising that Si(100) behaves quite differently from Si(111) concerning the wet chemistry effects. Namely, wet chemically treated Si(100) surfaces have been more rough without large atomically smooth terraces (figure 11). In contrast, different facets are typically formed on wet chemically etched Si(100) surfaces [166, 167, 170]. This difference is consistent with surface-recombination velocity measurements performed in situ during the immersion of Si(100) and Si(111) pieces in a HF-containing solution: Si(111) causes lower recombination velocity than Si(100) [161]. The peculiar behavior of Si(111) can be understood with the surface energetics: energy of the relaxed Si(111)(1 × 1) structure is smaller than that for Si(100)(1 × 1) [172].

If this energy is a significant factor behind the formation of atomically smooth etched terraces on Si(111), then a proper etching of another plane of Si(110) can be expected to produce large terraces more easily than on Si(100). That has not been evidenced by STM so far according to our knowledge. However it can be expected that significance of the wet chemical treatments of Si(110) increases because in many nanocrystals, the (110) planes are exposed and require the passivation. Furthermore, on the basis of the surface energy comparison, it might be speculated that a Si–Si dimer structure during a wet chemical treatment would enhance the terrace formation. However, in-situ STM measurements of Si(111) in NaOH solution [164] suggest that no dimer reconstruction occurs on the surface during the etching.

We would like to emphasize that STM measurements [166, 167, 169–171] have been the key to realize the exceptional properties of Si(111) because the surface diffraction methods (i.e. LEED and RHEED) and x-ray photoelectron spectroscopy (XPS) are not sensitive to local defects. Indeed it is known that STM measurements often reveal realistic surface quality.

Measurements of wet chemically treated III–V and Ge surfaces [174–179] also support that Si(111) is an unusual case because the post heating in UHV is typically needed to increase a crystalline order and the formation of atomically smooth terraces on the etched surfaces. Another difference between Si and III–V is that Si surfaces have typically hydrogen termination after the wet chemistry while III–V surfaces become enriched by group-V element in chemical treatments. Extra group-V adsorbates can be removed at relative low temperatures in UHV [174–178]. For example, extra arsenic from GaAs at around 350 °C. However, recently it has been reported a surprising wet-chemically induced InP(100)c(2 × 2) surface which resembles atomically smooth Si(111), and which is expected to be hydrogen terminated after a proper HCl immersion [179].

Indeed, HCl-based etching solutions have been found to provide smoother surfaces for III–V and Ge, as compared to the F-containing wet chemistry [174–180]. For Ge, both NH₄OH- and HCl-based treatments have been used successfully [180]. However, atomically smooth terraces, similar to those of Si(111), have not been reported so far in STM measurements of purely wet-chemical treated Ge surfaces. As mentioned above, the post heating in UHV conditions after a wet chemical treatment has been used particularly for III–V and Ge to obtain atomically smooth large-scale terraces. The UHV post heating also enhances smoothness of Si(100) as shown in figure 12.

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After a wet chemical treatment, a semiconductor surface contains carbon contamination, of which amount can be decreased by low-temperature (<450 °C) heating in UHV. Such incorporation of carbon at the surfaces is expected from the energetical viewpoint [181]. For example, the molecular bond strength of Si–C is similar to Si–H bond strength (360 kJ mol⁻¹). Furthermore, the Si–O bond strength of 450 kJ mol⁻¹ indicates the presence of oxygen incorporation although the H-termination of Si surfaces decreases O incorporation rate.

Theoretical simulations [182–184] for incorporation of carbon, hydrogen, and oxygen atoms into semiconductor surfaces in different chemical solutions and background gases would be helpful to understand the surface properties and their changes during the etching and the sample transfer to a next process step. Finally, GaN surfaces appear to be an exception among all semiconductor surfaces because smooth terraces can be observed even without any treatment (figure 12), which probably arises from the strong Ga–N bonding. Such untreated GaN surfaces still contain oxygen and carbon atoms which are incorporated into GaN without destroying the surface crystal structure completely.

To recapitulate, understanding of the specific properties of Si(111) and InP(100) in comparison to the other surfaces like Ge(111) and GaAs(100) is expected to contribute to development of the methods to decrease the surface roughness and atomic scale disorder. A clean semiconductor surface is not necessarily crystalline. STM characterization is expected to be useful in optimizing a wet chemical recipe which provides a clean and highly crystalline starting surface for the next device processing step.

In this section, we do not attempt to make a review on the semiconductor oxidation phenomenon. Excellent books and articles have been previously published about this subject [e.g. 14–17, 185–188]. It is accepted that for an oxidized semiconductor layer thicker than 4 nm, the Deal–Grove model where oxygen diffuses through the oxide film to the oxide/semiconductor interface and oxide growth occurs at the interface, describes the semiconductor oxidation, but the initial states of semiconductor oxidation are expected to be more complex [185–188].

Understanding of these issues is relevant to develop photonic devices because it is not possible to avoid the incorporation of oxygen atoms at practical semiconductor surfaces [e.g. 136, 189, 190]. This subject might be still controversial because sometimes it is described that it is possible to avoid the incorporation of a significant amount of oxygen (or carbon) atoms. Then a relevant question is what is a non-significant density of oxygen atoms because every defect can increase degradation. Second, which characterization method(s) is really sensitive enough to measure a density of oxygen atoms of 1‧10¹⁰ cm⁻² or lower, which means approximately one impurity per 100 000 host surface atoms or less. Toward that, XPS which is a really element sensitive method has been widely used to determine of a surface chemical composition in non-destructive manner. However, the resolution of XPS is around 0.5–1 atomic % (∼10¹²–10¹³ atoms cm⁻²), which is essential to take into account when making conclusions about non-significant amount of surface impurities [191–193]. Here STM measurements can be useful to reveal potential defect structures with a low and local density. It is still worth noting that oxygen-semiconductor bonds do not necessarily cause the band-gap defect levels directly. In contrast, oxygen incorporation often increases a disorder and, thus a point-defect density (e.g. broken dangling bonds) [194, 195].

Electrical measurements belong to the most defect sensitive probes even if they are not element sensitive. The microelectronic community has utilized capacitance–voltage (C–V) measurements of metal–insulator–semiconductor (MOS) capacitors to understand the interface-defect-induced electron levels [e.g. 196–198, 105, 106]. With the conventional MOS C–V methods, a care is needed to compare different device models in determining exact values of defect densities for comparison. Alongside conventional MOS C–V, also a non-invasive contactless technique called corona oxide characterization of semiconductors (COCOSs) [199, 200] has been developed. This method is based on measuring the surface contact potential via Kelvin probe, and allows to characterize the interface without the need for metal electrodes. The sensitivity of these two C–V techniques is based on a strong effect of defect-induced levels on carrier transport properties close to the semiconductor interfaces.

One argument for that why it is impossible to avoid oxygen atom incorporation into photonic device surfaces is the exothermic nature of oxidation; the formation of oxygen bonds clearly decreases the total (inner) energy of a semiconductor system [201]. Although the H-termination of Si surfaces decreases the oxidation rate, the incorporation of oxygen atoms into Si is expected to start immediately in O-containing environment because the Si-O bond is stronger than Si–H. Furthermore, it is very difficult to avoid the contact of a semiconductor with oxygen-containing environment. As presented in section 3, the vacuum-technology principles describe how a solid surface becomes covered by one adsorbate layer in one second, when the environmental pressure around a solid is as low as 1‧10⁻⁶ mbar [202]. If the background pressure is 1‧10⁻⁹ mbar, it takes 1000 s for one monolayer adsorption. Thus, a cleaned semiconductor surface becomes readily oxidized unintentionally due to the residual gas conditions which appear for example during the sample transfer to a film-growth instrument. Moreover, the growth conditions for insulating films are very oxygen rich, and interdiffusion of elements across an oxide/semiconductor interface readily increases oxygen incorporation into the semiconductor.

Incorporation of carbon atoms is also expected to occur although the bond strength between adsorbed carbon and a semiconductor element is typically weaker than that of oxygen bonding. This difference is also reflected in the UHV heating effect that the carbon XPS signal decreases in contrast to the oxygen one [116].

The surface reactions after the wet chemistry affect properties of the resulting interface although a high-quality SiO₂ film will be grown by the thermal oxidation of Si [61, 203–209]. The high-temperature (>700 °C) thermal oxidation is not possible even for all Si device interfaces. Therefore, low-temperature solution-based wet-chemical oxidation of Si has been developed to prepare an ultrathin SiO₂ passivation layer [210, 211]. Indeed, this approach allows to control oxygen incorporation into the interfaces, which would occur anyway at some stage(s) after the wet chemical cleaning. This subject is returned in section 4.4. Furthermore, the oxygen and carbon incorporation can be affected by other elements. Wet chemical nitridation, which provides relatively strong N bonds with III–V surface elements, has been used successfully for the surface passivation [212–214].

To recapitulate, because it is not possible to avoid oxygen and carbon incorporation into practical device interfaces, it might be useful to address the question if the structure of impurity-containing semiconductor surfaces can be modified such that they cause minimized losses [215]. This idea has been also supported by theoretical calculations which show, for example, that a proper oxygen rich GaAs surface provides the HfO₂/GaAs interface without the band gap levels [216].

The properties of a clean starting surface, in particular the atomic level smoothness is known to affect the structure of oxide-Si interface and to increase its crystalline order [217–219]. An increased crystalline degree naturally decreases the point defect density. However, it is not an easy task to prepare the atomically smooth starting surface with wet chemical treatments for semiconductors generally, as discussed in section 4.1. For Si(100), depositing thin epitaxial Si layers has been found to be a potential method [217–219].

After decades of research, it is nowadays widely accepted that the Si dangling bond, caused by missing of neighboring atom, is the main defect type at SiO₂/Si interfaces [e.g. 15, 16, 220–226]. In this defect structure, the Si atom with the dangling bond does not reach four bonds with neighboring Si or O atoms. It is also established that the SiO₂/Si interface is not atomically sharp typically. In contrast, the interface layer is extended or diffused at least when the high temperature thermal oxidation of Si is used to grow SiO₂ and when the oxygen diffusion toward Si is strongly enhanced (figure 13). It means that the number of oxygen bonds per Si atom increases from one (i.e. Si¹⁺ oxidation state) to four (i.e. Si⁴⁺ oxidation state) toward the topmost SiO₂. Also very sharp interface models have been developed for SiO₂/Si interfaces [217–219], which probably describe low temperature SiO₂/Si structures (e.g. wet chemically grown) better than the diffused interface model.

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The dangling bond structures are often called P_b defect which has a variation in the bonding structure depending on the number of oxygen bonds nearby the three-fold bonded Si atom. Understanding of the positions of different defect-induced electron levels in relation to the Si band gap has significantly improved via development of detailed computational physics methods because it is very difficult to measure experimentally the defect level position around the band gap with an atomic identification of the defect structure. Indeed theoretical calculations [e.g. 221, 223, 226] have confirmed that the P_b defects with dangling bond cause extra electron levels in Si band gap (figure 13). It might be still surprising that the density of these P_b-induced levels is often higher than 1‧10¹² cm⁻²eV⁻¹, if the interface is not specifically passivated by hydrogen [224], because SiO₂/Si has been considered an unusually high-quality exception among semiconductor interfaces. On the other hand, SiO₂/Si is the junction with an amorphous material, and the Si oxidation increases the structural disorder which naturally leads to the formation of point defects.

Structural disorder starts already at initial stages of the Si oxidation [15, 186, 188, 190, 195] where a part of Si atoms also detach and diffuse from sub-surface layers toward the top surface. In other words, Si-vacancy formation in the subsurface is an energetically favored process when the oxidation of Si surface starts [227]. There are also indications that it is possible to increase a crystalline degree of the oxidized Si surfaces [116, 228]. However, in addition to the vacancy-induced point defects (P_b), it is also relevant to consider the electron level distribution in the sub-oxide phases of SiO_x because a change in the amount of oxygen can cause an unexpected variation in the electronic structure of SiO_x [194]. A similar variation in the electronic structure for different oxide phases has been also found for III–V's [229]. Significance of these issues can be expected to increase in the applications where thin or ultrathin oxide layers are a part of the device structure.

Computational simulations have also improved our understanding of the probable defects causing the band-gap levels at III–V surfaces [e.g. 118, 230–232]. Group-V and -III dangling bonds as well as group-V dimers are the most likely defect structures causing extra electron levels around the band gap (figure 14). Furthermore at InP interfaces, the bonding configurations where P atoms have one or two oxygen bonds (i.e. low oxidation states of P) cause the band gap levels [233]. For III–N nitride surfaces, also carbon impurities have been considered as one dominant defect type [234, 235] but the nitride surfaces are not yet understood as well as other III–V surfaces. Similarly the SiC surfaces need future studies to establish the most probable defects, which include C–C bonding [236–238] even if C–C bond signal is not clear in XPS, but here it is worth to remind the limited XPS resolution and compare it to an expected C–C density.

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In contrast to Si, the native oxides of III–V and SiC are not typically high enough quality for the insulator-film purposes. Therefore, the insulator films (e.g. SiO₂, SiN, Al₂O₃ and HfO₂) have been grown by other methods such as CVD and atomic layer deposition (ALD) for insulator/III–V junctions. Still these interfaces include an intermediate layer of oxidized III–V or SiC, which might be useful to include in theoretical models to predict the properties of these interfaces. Recent studies have presented energetically favored structures for oxidized GaAs(100) and InP(100) surfaces [216, 233], which provide a realistic platform to simulate the interface properties and their modifications.

In this section we have focused on the band-gap electron levels, but it is worth noting that for example the band offsets and dielectric constants are also very relevant properties to the performance of many devices. Indeed, the dielectric constant, which arises from the external field-induced charge-density variation in a material, has been shown to differ from the bulk values at interfaces. Such deviation of the dielectric constant is due to the different interfacial atomic structure and affects particularly the insulating properties of ultrathin dielectrics [239, 240].

Decreasing densities of the gap levels and their effects have been investigated for many decades, and we are not able to review all those seminal studies in this work. Rather we provide example references to mention some of the most widely used passivation methods, and to address couple issues whose consideration might improve further the understanding and control of the defect state formation. For silicon device interfaces, the high-temperature thermal oxidation of Si, hydrogen passivation, wet chemical oxidation of Si, ALD of dielectrics, and field-effect passivation have been widely used to decrease the interface defect states and effects [30, 241–249]. For III–V interfaces, sulfur passivation, Si-interface layer deposition, Ga₂O₃ film growth, ALD self cleaning have been particularly utilized in applications [250–260].

Most Si devices include hydrogen, which is intentionally incorporated, because hydrogen is known to make a bond with the Si atom with the dangling bond. So-called forming gas anneal containing hydrogen is typically performed in the end of processing by heating the device material containing already insulator and metal films at temperatures below 500 °C in H-containing environment. Also many as-grown insulator films include hydrogen and provide an additional source of H. For example, solar-cell community has used a phenomenon called Al neal [261, 262]. It is worth noting that the starting Si surface often contains H bonds after the wet chemical cleaning, but these bonds are expected to cut during a thin film growth.

The hydrogen passivation has been essential to decrease the defect-level density to the level of low 10¹⁰ cm⁻²eV⁻¹ at Si interfaces. However, it has been realized that hydrogen incorporation into insulator/Si junctions can be also harmful and in fact degrade devices' performance [263–267]. The solar cell community has intensively investigated the phenomenon of light and elevated temperature induced degradation which is probably related, at least in part, to hydrogen incorporation and movement in the device material. Indeed hydrogen atoms can detach from bonding sites and diffuse at relatively low temperatures [263–267], while the typical Si cell manufacturing process includes a high-temperature heating step, firing above 800 °C where a metal contact channel is created through SiN insulator.

Thus one open issue is related to the control of H incorporation and effects, whether it is possible to place H atoms in the proper passivating position, avoiding the H-induced defects. Furthermore, less is known about the H incorporation effects on other semiconductor interfaces. Promising results have been obtained for H-containing Al₂O₃/GaN interfaces [e.g. 259].

The second point concerns the wet chemical oxidation of semiconductor surfaces, which has been developed particularly for Si devices because an ultrathin wet-chemical SiO₂ intermediate layer between Si and dielectric (e.g. HfO₂, Al₂O₃, SiN) has been found to improve the device performance [61, 203–211]. This method allows the low-temperature fabrication of ultrathin oxide layers, in contrast to the high-temperature thermal oxidation of Si that typically causes the broadened interface due enhanced oxygen and silicon interdiffusion. Thus some properties of the wet-chemical SiO₂ can be expected to differ from those of the thermally oxidized SiO₂. Understanding the possible differences helps to post-modify the properties of wet chemically prepared SiO₂/Si which might be partially metastable due to the low temperature growth. The thermal stability is essential because many device structures are post heated after the SiO₂/Si interface preparation.

Furthermore the studies of wet chemical oxidation for other semiconductor surfaces can be expected to advance the passivation technology because as discussed above, it is not finally possible to avoid the incorporation of oxygen atoms into semiconductor surfaces. For example, it is unclear if wet chemical procedures can provide a Ga-oxide rich GaAs surface and InPO₄ on InP which have been previously shown to be high-quality GaAs [216, 252, 253] and InP interfaces [233]. Moreover, the wet chemical nitridation [212–215] provides an interesting alternative to the oxidations because the N bonds are strong and provide a durable interface layer with a low defect density [268].

MIGS arise from metal wavefunctions extending to the semiconductor side. MIGS together with the point-defect induced gap levels cause significant carriers' recombination losses in particular in solar cells and photodetectors. Therefore, so-called tunnel oxide passivating contact (TOPCon) have been investigated intensively for Si solar cells [e.g. 269–276]. It means that an ultrathin insulator barrier is grown between a semiconductor and a metal film. If a metal film is separated from the semiconductor surface with the distance of 0.5 nm, the metal wavefunction intensity and MIGS density decrease significantly (figure 15). Such an insulator barrier also decreases the interaction of metal elements with a semiconductor (i.e. alloying) and the related defect formation.

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However, as discussed above, it is not straightforward either to prepare a high-quality insulator/semiconductor interface with a low defect-level density. Furthermore, a tunneling barrier causes an additional resistance. Thus a required level of contact resistivity determines whether the tunneling contact is a potential solution. It has been estimated that if the contact resistivity of 1‧10⁻⁷ Ω cm² or lower is needed to develop the overall device performance, then the tunneling contact is not anymore a viable structure [275].

One option to modify properties of the tunneling barriers is a doping of the barrier material (figure 16). If a controlled incorporation of ionized doping atoms into the barrier is doable, this approach allows development of the carrier selectivity of contacts. In other words, a static or fixed charge inside the tunneling barrier attracts electrons or holes and repels the minority carrier type. In addition, a proper barrier doping creates the electron levels outside the semiconductor band gap, which enhances the carrier tunneling process via the barrier levels and thus decreases a tunneling resistance. Another way for the carrier selectivity is an asymmetric alignment of the insulator and semiconductor band gaps such that either the conduction band electrons or the valence band holes experience a high energy barrier at the p-type or n-type contacts respectively.

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Another issue connecting the photonics device researcher and surface physicist arises from the question how the semiconductor n-type or p-type doping efficiency changes near the surface areas, and which methods are potential to increase the surface doping in order to decrease the contact resistivity [277–287]. A general rule is the higher doping the lower contact resistivity. However, the high surface doping also increases carrier recombination losses.

Donor activation energy (i.e. separation from the conduction band) has been found to increase at semiconductor surfaces [277, 278], but the reason(s) for this has remained unclear. Also it is still unclear how the embedded interface, for example, with an insulator film affects the doping activation barrier and thus the doping efficiency. Furthermore, unintentional interface impurities might change the doping atom bonding environment. The intentionally added hydrogen for the dangling bond passivation is expected to have a harmful effect on the doping efficiency [283].

To control the doping atom density at semiconductor surfaces, so-called monolayer doping has been developed [279–281]. To increase further the p-type doping at GaN, Lu et al [99] have deposited a Mg film on GaN and performed a proper post heating of Mg/GaN before the metal contact fabrication, while an oxidation of GaN surfaces has improved n-type doping [287].

Last but not least, the cleaning of a semiconductor surface is a very crucial step to decrease the contact resistivity. The high-quality starting template for a metal film enhances an epitaxial nature of the grown interface, which further decreases the density of point defects. For example, a coherent Ag/Si(111) interface has been recently found to decrease losses in the solar cell [288]. Furthermore, quantum mechanical simulations of atomic diffusion strengths [e.g. 179] at metal-semiconductor interface can clarify a tendency to the alloy formation. It can be expected that dry cleaning or etching methods, which are under an intense development [e.g. 289–291], become very useful to optimize also the contact interfaces in particular if these methods can be integrated with a metal-deposition instrument in situ manner without breaking a vacuum environment. It is worth noting that meaning of the dry cleaning methods is expected to increase in more general when three-dimensional structuring of device components increases; when trenches become deeper and more narrow, because the wet chemical methods do not perform properly for such structures.

Nanocrystals can be readily linked to surface science because the surface areas of a nanocrystal are a significant portion of the whole material. Different semiconductor nanomaterials such as quantum dots (QDs) and nanowires have been investigated from the viewpoint of applications and fundamental properties [e.g. 36, 292–318]. Although STM and scanning tunneling spectroscopy (STS) are in general challenging for three-dimensionally structured nanomaterial surfaces, STM and STS have provided a unique local real-space probe for elucidating the atomic and electronic structures of individual nanocrystals [36, 295, 298, 302, 303, 305, 312]. Semiconductor nanocrystals are also potential materials for future photonic devices such as photodetectors, solar cells, and LEDs [292, 298, 299, 301, 304, 306–311, 313, 315, 317].

Indeed, InP QD containing LED devices have been recently commercialized [308, 317]. These non-toxic InP nanocrystals, called also colloidal QD, have been manufactured in chemical solutions. There are also other methods to prepare nanocrystals; for example, layer-by-layer deposition on solid templates (i.e. from bottom to top) or partial removing of the surrounding material via dry and/or wet etching methods (from top to down).

Irrespective of the nanocrystal fabrication method, the common issue is how to protect nanocrystals against environment-induced degradation of the material as a function of time. One solution has been to cover nanocrystals by a shell(s) which protects the core crystal. For instance, ZnS-capped InP and CdSe colloidal QDs are used in applications [e.g. 308, 310, 317]. However, elegant in-situ photoluminescence (PL) measurements of CdS + ZnS capped CdSe QDs during the exposure to different gases have revealed that shell-covered QDs are also sensitive to environment [310]. Higher PL intensity means lower density of defects. Interestingly water molecules adsorbed on QDs are beneficial to increase the PL intensity while a plasma exposure of QDs quickly decrease their PL intensity [310]. Furthermore, for passivating QDs by ALD, many metal precursors have been found harmful to QD luminescence [310] indicating that a care is needed to engineer the shell-covered nanocrystal surfaces for starting the deposition of the next capping film.

Recent study of InP colloidal QDs (figure 17) passivated with water-free benzoyl fluoride has shown that the used F-based treatment does not remove all oxidized phosphorus from the InP QD surface but still the luminescence properties of InP QDs improve [314]. The surface phosphorus with a low oxidation state has been found to be more harmful than the highly oxidized P to the luminescence [314], which is a promising result because it is not possible to avoid the incorporation of oxygen atoms into QD surfaces in applications. That finding is also consistent with the computational results for the InP interfaces [233].

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Plasma is the common environment for semiconductor surfaces in device processes, for example, at the stages of etching of nanostructures (or mesas) and of film growth stages, but plasma interactions are also known to cause surface defects [319–327]. On the other hand, benefits of plasma sources include enhanced surface reactions at low semiconductor temperatures. The recent study (figure 18) has revealed effects of the plasma enhanced ALD growth of SiO₂ in relation to an alternative method to grow SiO₂ passivation layer for InGaN/GaN nano-LEDs using tetraethyl orthosilicate (TEOS) based sol–gel approach [315]. Before the SiO₂ growth, dry-etching induced disorder or amorphization was removed from the nitride mesa sidewalls by wet chemistry. Recent results [325] show that a method combining ultraviolet light exposure and ozone for surface oxidation followed by HF-based wet etching removes effectively the dry etching defects.

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Furthermore, the TEOS-based SiO₂ passivation film decreased atomic interactions and amorphization at the mesa GaN interfaces, which increased the LED output efficiency and decreased the diode leakage current [315]. Future studies can clarify what kind of GaN surface termination provides a durable bonding to the adsorbed TEOS-based SiO₂ nanocrystal material. Also, a well-justified atomic model for these GaN interfaces is helpful to understand atomic origins of the point defects that decrease radiative recombination and increase leakage current. The III–V nitride surfaces are an exception among semiconductors because the GaN-based surfaces remain largely crystalline although they often include significant amounts of oxygen and carbon. Furthermore, theoretical simulations for core-level binding-energy changes, based on the interface atomic models can confirm an intuitive identification of unusual Ga–Ga bonding structures [315].

Vertical sidewalls of three-dimensional nanostructures are of course much more challenging to measure by surface physics methods as compared to planar surfaces. One option to circumvent this problem is to prepare specific planar samples by using the same dry-etching and plasma parameters as for the device structuring [328]. Such planar 'model samples' can be expected to reflect the sidewall properties of devices, and can be measured efficiently by a large arsenal of standard surface-science tools. One potential direction to advance the device surface characterization is in-situ measurements [310, 329] in realistic chemical environments and pressures during the semiconductor surface reactions, instead of before and after the interface formation. Indeed catalysis community has taken such a step forward in metal surface studies to avoid so-called pressure gap [330–332].

SiC is an emergent semiconductor in industry, which has been utilized particularly in devices where Si and III–V do not perform properly for commercial purposes. Such applications include electronic and photonic devices used in harsh conditions like at high temperatures or/and under intense radiation. High-power transistors and ultraviolet and particles detectors are examples of industrial SiC devices [e.g. 333–341]. 4H-SiC is the common crystal phase with a high indirect band gap of 3.3 eV which enables a low thermal-generation dark current even at elevated temperatures and a solar-blind UV detection (250–280 nm), as compared to the common Si detectors.

One specific challenge in manufacturing SiC devices is high temperature treatments up to 1700 °C which are mainly needed to activate the doping after implantation and to fabricate alloyed Ohmic contacts. However, the high temperatures cause the formation of crystal defects both in bulk and at surface regions. Thus, one relevant question is how SiC surfaces can be protected during the high temperature treatments. Second, an alternative doping method(s) might be considered to prepare p–n junctions via the re-growth of doped SiC layers at lowered temperatures. On the other hand, Schottky contact metal–semiconductor–metal structures provide an opportunity to develop SiC-based photodetectors via low temperature processing because the activation heating for doping implantation and alloyed Ohmic contacts are not necessarily needed. One benefit obtained from lowering the processing temperature is a decreased surface roughness which further has been found to decrease the dark leakage current of Schottky detectors [334].

Concerning the wet chemical cleaning of SiC, a very strong background knowledge obtained in the Si technology can be applied also in SiC processing. Furthermore, SiO₂ is a natural oxide for SiC but the SiC oxidation has been found to cause higher interface defect density as compared SiO₂/Si [236–238, 342]. However, including nitrogen at SiO₂/SiC has been found to lead to a highly crystalline SiON/SiC interface (figure 19), which is also surprisingly stable in air [343–345]. This SiON/SiC with a (sqrt 3 × sqrt 3) structure is perhaps the only reconstruction so far which remains during prolonged air exposures. The high temperature exposure of SiC surfaces to H₂ and following N₂ gas flow at 1350 °C have been used to prepare this epitaxial SiON/SiC [343–345]. It is worth noting that no plasma source plasma source was used in preparing epitaxial SiON/SiC, consistent with the harmful plasma effects found for the crystallinity of GaN interfaces (figure 18). On the other hand, a plasma sources enables use of lower temperatures [346]. A thickness of the epitaxial SiON layer is 0.6 nm approximately, which provides a very potential tunneling barrier, for example, the photodetectors based on Schottky contacts (section 4.5). Future studies might clarify if it is possible to find low-temperature parameters to prepare crystalline SiON layers on SiC.

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One relevant question to decrease the processing temperatures of SiC crystals concerns if it is possible to grow a highly doped layers at lowered temperatures with a reasonable crystalline quality and low defect density because the high temperature is particularly needed to activate the doping after implantation and to enable surface alloying SiC with metal(s) for Ohmic metal contacts. For such re-growth purposes of doped layers, the starting SiC surface properties have a significant effect. Concerning the SiC interface passivation, a specific feature of SiC devices is the required high-temperature operation up to 500 °C or even higher. This means that the SiC interface passivation needs to be unusually stable as well. Most likely, the hydrogen passivation used widely in the Si technology does not meet this high temperature stability.

In this article we have described the connecting subjects using examples of the traditional semiconductors. However, it is important to note there are several emergent material systems which are potential for future photonic devices. Indeed, it can be expected that use of novel materials increases in photonic industry as well, for example, via constructing hybrid materials with several critical interfaces. Two-dimensional (2D) semiconductors and perovskites are examples which have attracted great interest [e.g. 347–363]. Perovskite solar cells have been recently commercialized [347].

Some of the above-described issues such as the development of surface passivation and Ohmic contacts are relevant to the research of emergent materials too. Each system has still own specific challenges, which on the other hand provide new connection opportunities. Surface areas form a significant part of the whole 2D semiconductor materials. However, their surfaces should be relatively inert without the dangling bonds, as compared to many traditional semiconductors with the covalent bonding structure. We are not able to review all those groundbreaking studies of 2D semiconductors, not to mention for other emergent photonic materials. In contrast, we point out here couple interesting properties in relation to the items introduced in section 4.

STM has been an essential tool to reveal a real structure and quality of practical 2D surfaces [348, 350, 354, 358]. Naturally, every material includes defects, and STM has been helpful to understand local defect formation at 2D surfaces also. Furthermore, the surface defects affect oxidation and metal contact formation on 2D semiconductors. Although the inherent inertness of 2D surfaces can be expected to decrease a rate of surface oxidation, it has been presented that it is not possible to avoid incorporation of oxygen atoms even into 2D surfaces, and how difficult it is to detect oxygen atoms [358]. On the other hand, it has been found that a proper oxygen incorporation does not cause the defect levels in the band gap [352, 358, 363], which supports a benefit of controlling the oxidation. Indeed, if we think the success of Si technology, one key factor has been a careful control of the Si surface oxidation. The second key factor has been controlling the electron and hole doping of semiconductors. Toward that, careful modification of the surface chemistry and doping is highly relevant [e.g. 359, 362, 364–366] because the traditional methods for bulk-like doping of 3D crystals cannot be efficiently employed. We assume that the whole semiconductor field gets a benefit from the development of novel surface passivation, doping, and contact methods for 2D materials.