Ultra-low power neuromorphic obstacle detection using a two-dimensional materials-based subthreshold transistor

Abstract

Accurate, timely and selective detection of moving obstacles is crucial for reliable collision avoidance in autonomous robots. The area- and energy-inefficiency of CMOS-based spiking neurons for obstacle detection can be addressed through the reconfigurable, tunable and low-power operation capabilities of emerging two-dimensional (2D) materials-based devices. We present an ultra-low power spiking neuron built using an electrostatically tuned dual-gate transistor with an ultra-thin and generic 2D material channel. The 2D subthreshold transistor (2D-ST) is carefully designed to operate under low-current subthreshold regime. Carrier transport has been modeled via over-the-barrier thermionic and Fowler–Nordheim contact barrier tunneling currents over a wide range of gate and drain biases. Simulation of a neuron circuit designed using the 2D-ST with 45 nm CMOS technology components shows high energy efficiency of ~3.5 pJ per spike and biomimetic class-I as well as oscillatory spiking. It also demonstrates complex neuronal behaviors such as spike-frequency adaptation and post-inhibitory rebound that are crucial for dynamic visual systems. Lobula giant movement detector (LGMD) is a collision-detecting biological neuron found in locusts. Our neuron circuit can generate LGMD-like spiking behavior and detect obstacles at an energy cost of <100 pJ. Further, it can be reconfigured to distinguish between looming and receding objects with high selectivity. We also show that the spiking neuron circuit can function reliably with ±40% variation in the 2D-ST current as well as up to 3 dB signal-to-noise ratio with additive white Gaussian noise in the input synaptic current.

Introduction

Brain-inspired neuromorphic computational paradigm offers the promise to revolutionize embedded energy-efficient decision-making systems by mimicking the event-triggered learning and inference aspects of the human brain. The hardware implementations of this paradigm can also mitigate the bottleneck in throughput via in-memory computing enabled by emerging nanoscale devices^1,2,3,4,5. Simultaneous advances in both electronic hardware and software algorithms in the recent years with a focus on low-power, low-area and time-efficient compute applications have fueled the progress in neuromorphic engineering. Spiking neural networks (SNNs) take inspiration from the brain for their architecture and consist of individual spiking neurons (smallest “computation” element) interconnected with each other through synapses (functional connection between the neurons). SNNs have been shown to perform complex computations with flexibility and robustness using minimal resources^6,7.

Autonomous robots and vehicles have been seeing significant growth and adoption by industry for manufacturing and transportation. Autonomous movement in unknown terrains requires efficient object tracking and timely obstacle detection capability. Obstacle detection and selective response for approaching and receding objects are highly useful for real-time path planning. Existing solutions based on VLSI vision systems with complex algorithms offer performance at the cost of area- and energy-inefficiency^8,9,10,11. Many biological species have collision-detecting neurons in their visual pathway to differentiate and detect threats based on the trajectory of incoming objects in their fields of view^{12,13,14,15,16}. For example, locusts have specialized looming-sensitive neurons, called Lobula giant movement detectors (LGMDs), in their visual neural pathway that are capable of detecting a possible collision with approaching objects within a few milliseconds. LGMD neurons encode the dynamics of incoming objects in their firing rate based on the size and velocity of the object^13,17,18. A fascinating detail about locust neurobiology is that they have only two such neurons (one per eye) to help them avoid collisions with precision and efficiency. Another important behavior of LGMD is its selectivity for looming collision threats while receding objects do not elicit a noticeable spike response. Such selectivity is crucial from a safety viewpoint especially when approaching objects are in direct collision path. Hence, LGMDs present an excellent example of a spiking neuron that efficiently implements the computational dynamics involved in a complex cognitive task with minimal resources.

In this work, we demonstrate a low power neuron that closely matches the essential computational features of the LGMD neuron using a subthreshold transistor based on two-dimensional (2D) materials. 2D materials are good candidates for a range of device architectures with tunable and low-power CMOS-compatible operation^{19,20,21,22,23,24,25,26}. We engineer a dual-gate 2D transistor that can generate a low-current bell-shaped current–voltage (I–V) transfer curve under subthreshold operation which is tunable via electrostatic control from the two gate-bias signals. The bell-shaped I–V is useful in mimicking fast activation and self-inactivation of Na-channels in biological neurons as described in the Hodgkin–Huxley (HH) model^27,28. Transport in the 2D subthreshold transistor (2D-ST) is shown to be governed by two separate physical phenomena, over-the-barrier thermionic current and Fowler–Nordheim (FN) tunneling current—through physics-based modeling of the bell-shaped I–V curves. The device design and operation are engineered to give a two-fold advantage over existing literature: (i) low-current operation to achieve high energy efficiency, and (ii) facile fabrication with low complexity by using a single material channel without compromising tuning capability via electrostatic control.

Next, we design a low-power circuit that incorporates the behavioral model of our 2D-ST device with 45 nm CMOS to show biomimetic class-I regular spiking behavior with low power (~3.5 pJ per spike) operation. Simulations show that the circuit can be adapted to function as an oscillatory neuron by adjusting the conductance of the leakage path and can also be modified to exhibit spike frequency adaptation (SFA) and post-inhibitory rebound (PIR) behavior. Both SFA and PIR are important functionalities demonstrated by biological LGMD neurons^29,30. We finally demonstrate that the neuron circuit based on our 2D-ST can mimic the behavioral features of an LGMD neuron under varying test conditions by modeling the synaptic current for looming (approaching) as well as receding objects. We show that the circuit is consistently able to detect looming objects prior to collision with a small number of spikes (<30) and energy dissipation of <100 pJ. Furthermore, the artificial neuron circuit is also able to effectively match the LGMD functionality of differentiating between looming and receding objects. This inherent selectivity to approaching objects helps in prioritizing the system response to impending collisions with obstacles in the direct path. Going another step forward, we also show how the LGMD circuit can be easily reconfigured to give either looming or receding object-selective spike response. Such flexibility adds a degree of freedom in real-time multi-object tracking system design with distinct responses for the speed and direction of moving objects in the field of view. We also evaluate the circuit for variation in 2D-ST current and noise perturbation in synaptic current.

This work demonstrates a spiking neuron circuit with biomimetic LGMD functionality with low-power spikes for energy-efficient obstacle detection applications. This would allow seamless inclusion of such circuits with always-on, low power SNN-based systems that operate using event-driven signal processing and computational algorithms. Additionally, the 2D-ST neuron also improves the power dissipation by several orders of magnitude over existing literature on biomimetic spiking neurons (×10⁵) and LGMD applications (×10²) with similar material systems^31,32,33. Energy efficiency can be improved further with the use of scaled transistor technologies^34,35.

Results

2D subthreshold transistor

The design of the 2D transistor is driven by the requirement of a low-current bell-shaped current–voltage transfer curve (I_D–V_G) that mimics the voltage-dependent conductance of biological Na channels so as to achieve bio-realistic spike frequencies with low energy dissipation. The bell-shaped curve with the negative and positive transconductance regions is used to implement positive feedback for spike initiation and self-inactivation for spike reset. This requirement is engineered in our device with simultaneous electrostatic control of (i) the 2D channel barrier to tune the conductance of the device, and (ii) the Schottky barriers to tune the FN tunneling-driven current injection. This dual electrostatic control is implemented in our device with a channel gate (G_C) and a source/drain Schottky barrier gate (G_B). Low device current is obtained via subthreshold operation under an appropriate biasing scheme. Figure 1a shows the fabrication steps for a 2D-ST. The devices were fabricated on Si/SiO₂ substrates, starting with the patterning of the G_C and G_B back-gates. Next, mechanically exfoliated hBN was transferred over the patterned gates as bottom-gate dielectric followed by dry transfer of the 2D semiconducting material. Three different 2D semiconductors viz. MoS₂, WSe₂ and WS₂ were tried out for this work showing that a bell-shaped I–V curve can be obtained irrespective of the channel material and its propensity for being n- or p-type. Lastly, source/drain metal electrodes were fabricated with an overlap with G_B for efficient control over FN tunneling current. Although mechanically exfoliated flakes were chosen for this study, the same architecture can be used for scalable manufacturing with large-area growth of the 2D dielectric and semiconducting materials.

Fig. 1: 2D-ST transistor design and operation.

a Schematics illustrating typical fabrication flow for the 2D subthreshold transistor (2D-ST) with multi-gate structure, hBN gate dielectric and n- or p-type 2D semiconductor channel. The two gates—channel gate (G_C) and barrier gate (G_B)—control the 2D channel barrier and the Schottky barriers at the source/drain contacts. b Optical image of an as-fabricated 2D-ST with a few-layer n-type MoS₂ channel. Scale bar is 10 µm. c Colormap showing device current as a function of the channel and barrier gate biases (V_GC, V_GB). As expected, the device shows n-type FET behavior. The line scan along $V_{GC}=V_{GB}$ direction from the current map results in a conventional n-FET transfer curve. Whereas, taking a line scan along the opposite direction ($V_{GC} \equiv -V_{GB}$) gives a bell-shaped curve under subthreshold operation. Subthreshold regime is targeted for low current values. Bell-shaped curve is useful to mimic the sodium (Na) channel behavior in a biomimetic spiking neuron circuit. d This technique to obtain a bell-shaped curve is applicable irrespective of the 2D channel material and dominant conduction polarity (n- or p-type). Results similar to (c) are shown with a p-type WSe₂ channel showing a bell-shaped curve for $V_{GC} = -V_{GB}$. Additionally, the bell-shaped curve is tunable by electrostatic control via G_C and G_B. Plots showing tuning of peak current e value and f position with appropriate biasing with the n-MoS₂ device. g Current through the device is controlled via Fowler–Nordheim tunneling current (V_GB) and over-the-barrier thermionic current (V_GC). The two current components can be modeled by two variable resistors (R_FN and R_ST) in series. h R_FN (blue) and R_ST (green) can be estimated through region-wise fits of the bell-shaped I–V curve using analytical equations. Center plot shows fitting of the complete I–V curve by combining the effects of both the resistors.

Optical image of an as-fabricated 2D-ST with an MoS₂ channel is shown in Fig. 1b. Thicknesses of the hBN and MoS₂ flakes were determined to be ~35 and ~3.5 nm, respectively, using atomic force microscopy (AFM) measurements (Supplementary Fig. 1). Device current for varying gate bias (V_GC, V_GB) values for the MoS₂ device is plotted in Fig. 1c. n-type MoS₂ gives negligible off-current (~5 pA) under negative bias ($V_{GC} = V_{GB}=-4\,V$) values and reaches high on-current (~600 nA) for positive bias ($V_{GC} = V_{GB} = 1\,V$) values. Current trace extracted from Fig. 1c for the condition $V_{GB} = V_{GC}$ gives conventional n-FET behavior (red curve on the top right) as expected. However, a low-current (~15 nA) bell-shaped curve (blue curve on the top left) can be achieved by taking the current trace along the opposite direction ($V_{GB} \equiv -V_{GC}$) which forces the device to operate in subthreshold regime. We specify the subthreshold operation based on the device current being lower than at the maximum linear transconductance (g_m,max).

The proposed biasing scheme is applicable irrespective of the channel material and its charge polarity (n- or p-type). Figure 1d shows results similar to Fig. 1c with a p-type WSe₂ channel. Current trace along the $V_{GB} = V_{GC}$ direction gives a conventional p-FET response (red curve) whereas a trace along the $V_{GB} = -V_{GC}$ direction results in a bell-shaped curve (blue curve) with low current levels (~4 nA). Similar results were obtained with n-type WS₂ as well (Supplementary Fig. 2). Moreover, due to the degree of freedom provided by electrostatic gating, these bell-shaped current peaks can be further tuned for desired peak current value or position by setting an appropriate offset voltage $V_o(V_{GB} = -V_{GC} + V_o)$ and V_D (Fig. 1e, f). Such tunability could be leveraged in device operation to achieve tunable Na-channel current in the biomimetic neuron design.

Band diagram in Fig. 1g illustrates how the two gate voltages V_GC and V_GB control the thermionic current at the source barrier and FN tunneling at the contacts, respectively. An equivalent model with variable resistors R_ST and R_FN corresponding to the two transport mechanisms is shown, where the total resistance of the device is $R = R_{ST} + R_{FN}$. In the subthreshold regime, the device current is limited by the source-to-channel barrier (governed by V_GC) when carrier injection is not limited (large V_GB) on the left of the bell-shaped curve. The operation gradually switches to carrier injection limit (negative V_GB) with no source-to-channel barrier (large V_GC) toward the right of the curve as shown in the I–V curve (MoS₂ device) in Fig. 1h. A physics-based region-wise fitting was performed to elucidate the transport regimes limited by over-the-barrier transport (V_GC) on the left (green) and FN tunneling (V_GB) on the right (blue). The set of equations used to model each transport regime along with illustrative partial energy band diagrams are shown on either side of the I–V curve in Fig. 1h. Here, we can achieve low-current bell-shaped I–V by leveraging the device architecture to engineer its operation via simultaneous control of the two transport mechanisms. The fitting of the bell-shaped I–V curves is discussed in detail in Supplementary Discussion 1 along with the correlation of extracted parameters with the physical device dimensions. We note that with the same set of model parameters, we are able to obtain excellent agreement between the model and experimental data over a wide range of operating conditions with high confidence, confirming that the two-regime model can accurately explain the underlying physics behind the bell-shaped operating curve. We also note that the underlying physics behind our devices is hence different from previously reported Gaussian transistors^33,36 which rely on both n- and p-type 2D materials; or our previous work on anti-ambipolar transport²⁰ which relies on ambipolar channel material. 2D-ST in this study shows completely unipolar transport during the bell-shaped I–V operation, irrespective of the channel material type.

Biomimetic neuron

The axon hillock neuronal circuit incorporating a lookup table-based Verilog-A model of the 2D-ST transistor along with components from the 45-nm CMOS general process design kit (gpdk) is shown in Fig. 2a. Here, V_M denotes the membrane potential at the axon hillock which collects the aggregated synaptic current from the pre-neurons (represented by a current source I_syn in the simulations) and also serves as the output node for the post-neurons. C_M is the membrane capacitance for the cell. Na-channel is mimicked by the 2D-ST as the pull-up transistor T_Na whose current is governed by the two gate inputs V_GC and V_GB. The gate biases of T_Na are driven by two inverters (I1: MP1_Na–MN1_Na, and I2: MP2_Na–MN2_Na) that enable generation of the polarizing Na-channel current (I_Na) based on the membrane potential V_M, while ensuring that V_GC and V_GB move in opposite directions (i.e., $V_{GB} \sim -V_{GC}$) to generate the required bell-shaped I–V response. Na-activated K-channel current (I_K) is implemented by the transistor T_K driven by a delay element (MN_K-C_K) to mimic a delayed response activated mainly by the large I_Na flowing in the circuit after Na-channel activation. A leakage path with high resistance is provided with the transistor T_L in OFF condition. Conductance of T_L can be varied to tune the threshold input current (I_T) required to elicit a spike response.

Fig. 2: Biomimetic neuron with 2D-ST.

a Schematic of the simulated circuit showing 2D-ST to mimic sodium (Na) channel current. The two inverters (I1: MN1_Na–MP1_Na and I2: MN2_Na–MP2_Na) are used to drive the two gates (V_GC and V_GB) of the 2D-ST. T_K with a delay element (MN_K–C_K) provides a delayed potassium (K) channel current. C_M is the membrane capacitor. T_L represents the leakage path. V_DD is the supply and I_syn is used to supply input synaptic current. All transistors (MOSFETs) and capacitors (MOSCAPs) except for the 2D-ST are taken from 45 nm pdk. The node V_M is where the action potential, or spike, is recorded. Bell-shaped curve of the 2D-ST shown on the right is highlighted with the trajectory during the spike generation for the steps 2–4. b Simulation result for a 10 μs, 500 pA I_syn pulse shows generation of a single spike. Na and K channel currents are also plotted for reference with inward current (with respect to V_M) shown as positive. An undershoot with respect to the rest potential (V_rest) is also observed as shown. c Circuit response showing regular spiking behavior for a continuous 500 pA input current. d Raster plot showing spike activity as a function of input current magnitude. Low current values up to 300 pA do not elicit spikes indicating a threshold input current (I_T) to generate spikes. Increasing current value from 400 to 1000 pA gives consistent spikes with monotonically increasing spike density. The interval between two consecutive spikes, or inter-spike interval (ISI), is used to record the instantaneous spike rate or frequency. e Spike width measured at V_M = 300 mV shows negligible variation with I_syn magnitude. Error bars indicate standard deviation (σ). f Energy per spike varies between 4.5 and 3.5 pJ with I_syn, whereas spike rate (or ISI⁻¹) increases linearly with I_syn. g I_T can be adjusted by changing the conductance of T_L (g_L) with appropriate W/L ratio, where reducing the conductance leads to reduced I_T and increased spike rate. Data shown in (b–f) corresponds to g_L3. The case corresponding to much lower conductance g_L0 shows non-zero spikes at I_syn = 0 suggesting that the circuit can also be used as an oscillatory neuron.

To understand the circuit operation, consider the initial condition where all capacitors are discharged and the membrane is at rest potential $(V_{M} = V_{rest})$. (1) Input synaptic current (I_syn) from pre-neurons starts charging C_M with a V_M-dependent leakage current I_L flowing through T_L. (2) Once V_M reaches the turn-on threshold of the inverter I1, the gate bias V_GC decreases while the gate bias V_GB starts to increase through the action of the inverter I2; causing a large (compared to I_syn) depolarizing current I_Na to flow from T_Na. This action of the 2D-ST device is hence crucial in obtaining a sharp rise in membrane potential, mimicking the spiking action in biological neurons. (3) This excess current I_Na starts charging C_K rapidly to activate the delayed response from T_K. The circuit is designed such that the current I_Na from the 2D-ST starts to decrease in this step, by leveraging the bell-shaped curve of the 2D-ST to mimic the closing of the Na channels in biological neurons. (4) Once T_K is activated, it works as a sink to discharge C_M (equivalent to a polarizing current) which brings V_M down rapidly and switches off I_Na as well in the process. Since discharge of C_M is triggered through decreasing I_Na, the inverters I1 and I2 self consistently provide negative feedback to the 2D-ST (similar to biological Na channel behavior) and bring it down to the same biasing condition as at the start of the cycle. These steps complete one cycle for action potential (spike) generation. Trajectory of the 2D-ST current mapped to its bell-shaped I–V response is shown on the right in Fig. 2a. A single spike generated for a 10 μs/500 pA I_syn pulse is plotted in Fig. 2b along with I_Na and I_K with inward current shown as positive. This circuit behaves as a regular spiking neuron as observed from its response to a continuous 500 pA I_syn stimulus (Fig. 2c). Its equivalence with the HH model is discussed in Supplementary Fig. 3. Furthermore, the circuit behavior as a leaky-integrate-and-fire (LIF) neuron is probed with variable frequency and pulse width of the I_syn pulses as detailed in Supplementary Fig. 4.

Reduction in I_Na with V_M (self-inactivation) is achieved in this circuit, thanks to the bell-shaped I–V characteristics of the 2D-ST. This is crucial in reducing the excess current through C_K with V_M and allowing it to discharge through T_K. It is important to note that once the Na-channel current is activated, the circuit goes into a self-sustaining loop to complete the entire cycle of spike generation irrespective of the I_syn. This is a notable characteristic behavior observed in biological neurons as well. Additionally, once T_K is activated, it can drive V_M below V_rest (hyperpolarization) to give an undershoot with respect to V_rest until its gate voltage, decided by MN_K-C_K, falls back toward zero (ground). Threshold voltage of the 2D-ST is crucial to set its region of operation that is compatible with the rest of the transistors in the circuit. The fabricated 2D-ST devices operate in the 2 V range as the effective oxide thickness (EOT) of these devices is ~40 nm compared to the 0–1 V operating regime of the nominal 45 nm CMOS transistors whose EOT is ~2.5 nm. Hence, to account for the EOT and threshold voltage difference during circuit evaluation, behavioral characteristics of p-WSe₂ 2D-ST device were used after scaling the gate bias as ${\rm{V}}{\rm{\mbox{'}}} = {{\rm{V}}/4 + 0.5}$ to map the range of ±2 V to the nominal range of 0–1 V for the 45 nm pdk. We have also designed and simulated a similar circuit that uses R-C components instead of the CMOS components operating at a larger $V_{DD} = 2\, {{V}}$ to accommodate for the wider gate-bias range (±2 V) of the p-WSe₂ device without scaling (Supplementary Fig. 5) to demonstrate biomimetic LIF neuron behavior with energy dissipation of ~500 pJ per spike.

Circuit simulations were repeated for I_syn magnitudes ranging from 100 to 1000 pA and their results are summarized in Fig. 2d. Each bar (|) in Fig. 2d represents a spike. No spike is generated for I_syn = 100–300 pA indicating an $I_T > 300 \,{{pA}}$. Class-I regular spike response³⁷ was observed for $I_{\rm{syn}} \ge 400\, {\rm{pA}}$ with the spike rate increasing with I_syn magnitude. Instantaneous spike rate can be represented by the duration between two consecutive spikes, denoted as inter-spike interval (ISI), with a smaller ISI meaning a larger spike rate. Spike width measured at $V_M = 300 \,{{mV}}$ corresponding to the circuit response for a range of I_syn values showed little variation as shown in Fig. 2e. Energy per spike (EPS) is calculated as the energy dissipated by all the circuit components during one complete spike. Figure 2f shows the evolution of EPS and ISI⁻¹ with I_syn. An EPS value as low as ~3.5 pJ makes this circuit useful for low-power spiking neuron applications. It should be noted that the 2D-ST consumes only about 10–15% of the total energy dissipated by the entire circuit (Supplementary Fig. 6). It indicates that the EPS values listed in this study can be further brought down by approximately ~5× (sub-1 pJ per spike) by using more power-efficient peripheral circuits (such as scaled technology nodes optimized for low power). An exercise similar to Fig. 2d was repeated for different leakage conductance (g_L) values by changing the W/L ratio of the transistor T_L. Smaller value of g_L results in smaller I_T as seen in Fig. 2g, and can also achieve a spiking response for I_syn = 0. Such a circuit can be used as an oscillatory neuron which spikes periodically at a constant rate without any external synaptic current input. This configuration can be useful in the implementation of thalamocortical networks^38,39. The spiking neuron circuit behavior can be made flexible by modular circuit design. The leakage transistor (T_L) can be divided into a multi-device configuration with multiple switches to choose from a set of quantized leakage conductance levels, and hence, input threshold current for spike generation. Furthermore, different bias levels can be added for the membrane capacitance, and sodium and potassium channels. This would enhance flexibility to match artificial spiking neuron behavior to a variety of biological neuron behaviors. Details of each of the components of the circuit in Fig. 2a are listed in Supplementary Table 1. Our circuit area is dominated by the two capacitors C_M and C_K (90%). The overall circuit area can further be optimized by using the scaled technology nodes with high density capacitor components.

Spike frequency adaptation (SFA) and post-inhibitory rebound (PIR)

In addition to regular spiking behavior, biological neurons show a rich repertoire of spiking patterns³⁷. These different spiking behaviors serve different functional requirements of neural networks. SFA and PIR are two such features that can enable complex neural computations at the single cell-level. SFA in neurons has been shown to play an important role in several tasks involving cognition, inference, and memory^40,41,42. Approximately 40% of neocortical excitatory neurons in the human brain show SFA functionality. SFA implies that for a constant input synaptic current, spike rate of the neuron decreases gradually with time with time constants determined by the underlying biochemical mechanisms. Several ionic channels have been shown to contribute to spike rate adaptation. Ca²⁺-activated K channels (polarizing current) are one of the important ionic channels that enable SFA functionality^43,44.

SFA can be achieved using the circuit in Fig. 2a with the minimal modification of adding a delay element (D0-C_CaK) to drive the leakage path T_L as shown in Fig. 3a. These changes make T_L perform two tasks simultaneously—(i) provide a constant leakage path (equivalent to when C_CaK is completely discharged), and, (ii) provide a time-dependent delayed K channel current I_CaK (different from Na-activated K channel current I_K) controlled by D0-C_CaK. Hence, current through T_L can be expressed as $I_{TL} = I_L + I_{{{CaK}}}$. Details of each of the components of the circuit in Fig. 3a are listed in Supplementary Table 1. Figure 3b shows a raster plot showing spike activity (for the circuit in Fig. 3a) for a range of I_syn amplitudes. The reduction in spike rate (or increase in ISI) with time for no change in I_syn indicates SFA behavior.

Fig. 3: Spike frequency adaptation and post-inhibitory rebound.

a Schematic of the modified circuit to demonstrate spike frequency adaptation by mimicking calcium-activated potassium channel (K_Ca). A diode D0 in series with a capacitor C_CaK (marked in red) lead to a non-linear, delayed rise in hyperpolarizing current with help of the transistor T_L. b Raster plot showing spike frequency adaptation by simulating the circuit in (a) for a range of amplitudes (200–600 pA) of the I_syn pulses. ISI increases with time, or in other words, spike frequency reduces. c Instantaneous ISI and current through T_L (I_TL) as a function of time for 500 pA I_syn pulse. I_TL emulates both leakage current (I_L) and K_Ca current (I_CaK). ISI⁻¹ decreases and saturates to a lower value in response to an increase in I_TL. d Instantaneous ISI⁻¹ as a function of time similar to (c) for the data in (b). The data is fitted with an exponential decay function to extract initial spike frequency (f₀), steady-state spike frequency (f_ss) and the decay time constant (t_SFA). Adaptation factor (f_adap) is calculated as $(f_0-f_{{{ss}}})/f_0$. e Plots showing parameters extracted from (d) with I_syn. As expected, f₀ increases with I_syn with lower f_ss values. t_SFA does not vary with I_syn as expected, and f_adap increases with I_syn suggesting a limit on the spike rate because of I_CaK. f Functionally, the same components (D0-C_CaK) also help elicit a rebound signal after an inhibitory (negative) current input. V_M plot after the end of a −100 pA I_syn pulse shows spike generation. Inset shows increasing post-inhibitory rebound in V_M for lower I_syn magnitudes (10–30 pA) which fail to generate spikes. g Raster plot showing spike timing for inhibitory I_syn magnitudes. The number of spikes and ISI⁻¹ increase with increasing negative I_syn. The time of the last spike occurrence with respect to end of inhibitory input is recorded as t_end. h Peak ISI⁻¹ and t_end increase reaching saturation with more negative I_syn. Saturation in t_end and its similarity to t_SFA reaffirms the role of D0-C_CaK in evoking post-inhibitory rebound.

To elucidate the role of I_CaK in SFA, instantaneous ISI⁻¹ is plotted for I_syn = 500 pA as a function of time along with $I_{TL} = I_L + I_{CaK}$ in Fig. 3c. Since I_L is very small compared to I_CaK, and does not vary with time, we can assume $I_{TL} \approx I_{CaK}$. Decrease in ISI⁻¹ shows one-to-one correspondence with increase in I_TL. Temporal ISI⁻¹ trends for all I_syn magnitudes (200–600 pA) were fitted with an exponential decay function $f\left(t\right)=\left({f}_{0}-{f}_{{ss}}\right)\cdot {{\exp }}(-t{/\tau }_{{SFA}})+{f}_{{ss}}$ (Fig. 3d). The extracted parameters—initial spike frequency (f₀), steady-state spike frequency (f_ss), and the decay time constant (τ_SFA)—are plotted in Fig. 3e along with the frequency adaptation factor calculated as ${f}_{{adap}}=\left({f}_{0}-{f}_{{ss}}\right)/{f}_{0}$. Both f₀ and f_ss increase with I_syn (top plot) with f_ss showing saturation, resulting in an increasing f_adap as shown in the bottom plot. Note that τ_SFA remains largely unchanged and independent of I_syn as expected, since it is determined by the time constant of the D0-C_CaK pair.

In addition to SFA, this same circuit was able to elicit PIR behavior as well in response to inhibitory (negative) I_syn. PIR refers to an overshoot in the membrane potential of a neuron after an inhibitory current input ends. One or multiple spikes may be generated by the neuron based on the magnitude of the rebound potential. PIR is an important neuronal behavior useful for complex tasks in cognition and short-term memory retention^45,46,47,48. Figure 3f shows the V_M response after the end of an I_syn = −100 pA pulse at 250 ms. Multiple spikes were recorded with increasing ISI before V_M settled back down to V_rest. Inset shows PIR for small negative I_syn values (−10 to −30 pA) which fail to generate a spike. Gradual relaxation in V_M with time indicates that the rebound signal is triggered mainly by the excess negative charge stored in the capacitor C_CaK which turns off T_L. Figure 3g shows a raster plot of spikes for a range of I_syn values (−40 to −100 pA) suggesting that both the spike count as well as the spike rate increase with increasingly negative I_syn. The peak ISI⁻¹ is calculated from the ISI for the first two spikes and duration from the end of the inhibitory input (here, 250 ms) to the occurrence of the last spike is recorded as t_end. These parameters (peak ISI⁻¹ and t_end) are plotted in Fig. 3h. Both the peak ISI⁻¹ and the t_end saturate with I_syn. Similarity of t_end and τ_SFA values indicates that the D0-C_CaK pair plays a key role in eliciting both SFA and PIR response. In addition, the normalized decay profiles for the spikes with time (shown in Supplementary Fig. 7) were identical for all I_syn values further reconfirming a uniform decay time constant (based on D0-C_CaK).

Mimicking Lobula giant movement detector (LGMD) response

Many insects and even large animals contain specialized neurons in their visual neural pathway for obstacle detection. These neurons have the capability to detect objects moving toward them and trigger large firing rates when the potential for collision is detected based on the speed and direction of the incoming object. Such computations are extremely energy-, area- and time-sensitive in neurobiology. Small insects like locusts have developed compact and efficient collision detection neurons such as the LGMD. A single LGMD can detect collision of an incoming object within a short time (usually a few milliseconds) with good energy efficiency based on complex computations involving size, location and speed dynamics of the object. Figure 4a shows an illustration of the LGMD neuron along with important dendritic trees and neurons. A large dendritic network including lateral and feed-forward inhibitions is an important part of LGMD operation. Another neuron, the descending contralateral movement detector, is an equally important part of the system which receives input from the LGMD and can trigger motor neurons if a collision is detected. Neuromorphic algorithms based on LGMD neuron behavior have been implemented for obstacle detection and avoidance in mobile robots and automotive applications^49,50,51,52. Figure 4b shows how LGMD computes a complex function (encoded as the spike rate) based on the dynamics of the angle an object makes on the visual field of the locust. Time axis is plotted with respect to time-to-collision (t_C). θ depends on the size (l) and speed (v) of the object as $\theta \left(t\right)=2{{{\tan }}}^{-1}(l/(v\cdot t))$. Firing rate of the LGMD neuron can be estimated by the expression $f\left(\theta \right)={\theta }^{{\prime} }\cdot {{\exp }}(-\alpha \theta )$. Here, the parameter l/v determines the spike response such that a smaller l/v (a small but fast-moving object) elicits a higher firing rate implying a larger threat.

Fig. 4: Obstacle tracking and collision detection with LGMD-like spike response.

a Illustration showing the vision system of a locust with the Lobula giant movement detector (LGMD) neuron. b LGMD neuron performs a complex computation with θ and $\theta {\rm{\mbox{'}}}$ to stimulate an escape response based on the size (l) and speed (v) of an object. Firing pattern of an LGMD neuron can be approximated by the expression $f\left(t\right)={\rm{\theta }}{\rm{\mbox{'}}}{\rm{exp }}(-{\rm{\alpha }}{\rm{\theta }})$. A smaller l/v represents a higher threat and elicits a larger response. c Firing pattern of the neuron with SFA and PIR shown in Fig. 3a is plotted for a range (100–1000 pA) of I_syn amplitudes. A low value of I_syn of 100 pA resulted in discontinuation of spiking due to excess hyperpolarization by I_CaK. Sustained spiking was observed with moderate (200–700 pA) I_syn values. Higher (800–1000 pA) I_syn resulted in halting of spikes because of excess depolarization of the membrane. These traits, along with PIR, help the artificial neuron mimic LGMD behavior closely. d Response (V_M and raster plot) of the circuit for an I_syn pulse (100–250 ms time span) to mimic synaptic current into an LGMD neuron for a looming stimulus. Time to collision (t_C) is set at 250 ms after which the synaptic current remains constant. e Instantaneous spike rate (top) and spike time (bottom) for I_syn inputs similar to (d) for a range of l/v values. Peak spike rate is achieved in each case prior to t_C. f Peak ISI⁻¹ and total number of spikes (and hence, energy) increase with decreasing l/v indicating that an input with higher threat triggers an enhanced response at the cost of higher energy consumption. g–i Similar data as in (d–f) for receding stimuli, and with 2× leakage conductance (g_L).

Biological LGMD neuron demonstrates many features like SFA, PIR, afterhyperpolarization, initial burst response to a small input current, and halting of spikes³⁰. It is important to reproduce these functionalities in an artificial neuron to mimic LGMD response closely with speed and energy efficiency. The circuit in Fig. 3a was able to match all of the traits listed above, and hence, can be used to implement complex LGMD behavior with appropriate input current modeling. Figure 4c shows the circuit response to a wide range (100–1000 pA) of I_syn magnitudes. For a small I_syn value of 100 pA, a limited number of spikes were recorded before the spiking activity stops due to excess hyperpolarization caused by increased I_CaK. This closely mimics the behavior of LGMD at relatively small input excitation. On the other hand, the spiking is sustained for the entire duration of the current pulse for intermediate (200–700 pA) I_syn values with SFA. Finally, for large (800–1000 pA) I_syn values, spiking halts because of excess depolarization, which can help to achieve a drop in the firing rate based on the synaptic current levels when approaching t_C.

Synaptic current generated by the input dendritic network of the LGMD neuron for a looming (approaching) object can be modeled based on the angular size (θ) of the looming object as ${I}_{{syn}}\propto \theta {\rm{\mbox{'}}}$, which can be expressed in terms of the parameter l/v as ${I}_{{syn}}(t)=\frac{\kappa \cdot (l/v)}{{t}^{2}+{\left(l/v\right)}^{2}}$, where κ is a proportionality constant⁴⁰. Figure 4d shows V_M response (middle panel) of the neuronal circuit and a raster plot (bottom panel) for the I_syn(t) waveform (top panel) with κ = 10 pA∙s, l/v = 10 ms, and t_C = 250 ms. The input current is applied after an initial delay of 100 ms in each simulation to enable the circuit to relax to the rest state. Mimicking the biological LGMD, the artificial neuron issued spikes once the input current (i.e., threat of the looming stimulus) was sufficiently large. Spike rate (ISI⁻¹) peaked before I_syn reached its maximum value near t = t_C and then dropped. The same exercise with t_C = 250 ms was repeated for multiple l/v values (10–15 ms) and the spike response is shown in Fig. 4e as a raster plot (bottom panel) along with the corresponding instantaneous ISI⁻¹ values plotted in the top panel. Peak spike rate increases monotonically with decreasing l/v (increasing threat) as observed in biological LGMD. Furthermore, the peak ISI⁻¹ value is reached before t_C, suggesting successful detection of collision in each case.

Peak ISI⁻¹ generated for each of the cases in Fig. 4e is plotted in the top panel of Fig. 4f. The total number of spikes and corresponding energy dissipation during the entire duration of the I_syn signal are plotted in the bottom panel. Increasing number of spikes along with increasing spike rate for smaller l/v values represent an elevated collision threat and uses higher energy. The total amount of energy dissipated by the circuit for the duration of over 300 ms does not exceed ~100 pJ for the smallest l/v value. This observation indicates how computationally complex and time-sensitive tasks can be performed using bio-inspired neuromorphic solutions with minimal energy cost. The recorded energy consumption of ~100 pJ with LGMD spike response improves both the power consumption and ease-of-integration in SNNs over contemporary reports on mimicking LGMD operation^31,32. The response of the circuit for receding objects (similar to Fig. 4d–f) is shown in the Supplementary Fig. 8. Spike response to I_syn mimicking receding objects showed smaller spike count along with a shorter duration of response. These traits are also observed in biological LGMD neurons enabling them to differentiate between looming and receding objects²⁹. As mentioned earlier, inherent selection of collision-sensitive stimuli adds another layer of safety and can ensure quick response time with low energy dissipation. Additionally, the spike behavior for I_syn corresponding to a looming stimulus can be further tuned (for the same l/v values) by appropriate choice of the sensor proportionality constant κ as shown in the Supplementary Fig. 9. Such tuning can enable the use of the circuit in applications with limitations on energy consumption (small spike rate with small energy dissipation) or applications requiring time-critical response (large spike rate with higher energy dissipation) without any physical change in the circuit of the neuron.

Spike response from the artificial neuron circuit can be further modulated by choosing an appropriate conductance g_L of the leakage transistor T_L. Supplementary Fig. 10 shows how spike count and peak ISI⁻¹ shift from a looming-selective response toward a response only for receding stimuli (zero spikes for looming stimuli) as the leakage conductance is increased. Selectivity modulation via circuit design can enable a neuron network that can provide complete information of the speed and type of movement (looming vs receding). Figure 4g–i shows circuit response to receding stimuli with monotonically increasing peak ISI⁻¹ as the l/v value decreases with a constant spike count, and hence the dissipated energy of ~11 pJ. Instantaneous and peak ISI⁻¹ values along with the spike count in the output can enable accurate detection and tracking of the looming as well as receding movements of objects with high energy efficiency. Moreover, since there are no additional bias references or stored values, variation in spike behavior due to perturbation in such cases is preempted. We have presented the circuit behavior under two major sources of variation, viz., 2D-ST current and I_syn current in Supplementary Discussion 2. The LGMD circuit operates reliably for ±40% variation in I_2D-ST and up to 3 dB signal-to-noise ratio (SNR) with added white Gaussian noise in I_syn. This LGMD-like circuit can be easily incorporated into SNNs. Since LGMD is a neuron that performs complex sensory data interpretation to evaluate if there is a probable obstacle on the way, it is located at the input layer of a neural network system. Spike output from the LGMD-like neuron can be used in SNNs to either generate learning patterns or for decision making in autonomous vehicles to avoid impending collisions. Also, variability and noise tolerance of the circuit makes it well-suited for integration with SNNs without loss of reliable circuit operation.

Discussion

In summary, subthreshold operation of electrostatically controlled 2D channel transistors and its application as biomimetic artificial LGMD neuron have been demonstrated. Device operation is unaffected by the choice and transport polarity (n- or p-type) of the 2D channel. The 2D-ST can be electrostatically controlled by two gate-biases (V_GC, V_GB) to give a tunable, low-current bell-shaped subthreshold current that mimics the Na-channel current observed in biological neurons. Device current from the subthreshold operation of 2D-ST has been modeled and fitted using an over-the-barrier thermionic current controlled by V_GC, and a FN tunneling current controlled by V_GB. Simulation results of a circuit designed with 45 nm pdk components and the 2D-ST exhibit neuron operation closely matching the HH model for biological neurons. EPS as low as ~3.5 pJ was observed with monotonically increasing spike rate for class-I spike behavior. The same circuit can also be used as an oscillatory neuron after appropriately adjusting the leakage current component. Additionally, the circuit was modified to demonstrate SFA and PIR behaviors by mimicking the Ca²⁺-activated K-channel polarizing current that controls both the spike rate as well as the membrane potential relaxation time scale. The artificial neuron circuit with the 2D-ST is shown to achieve all important functionalities of LGMD neurons including SFA and PIR responses. Simulation results demonstrate that the artificial neuron is able to detect approaching objects well ahead of collision with limited number of spikes and total energy consumption less than ~100 pJ. The same circuit can also differentiate between looming and receding stimuli, much like a biological LGMD neuron. Moreover, the circuit is impervious to ±40% variation in the 2D-ST current as well as up to 3 dB SNR with additive white Gaussian noise in the input synaptic current. Furthermore, the ability to tune the selectivity of the LGMD neuron circuit response to looming vs receding objects adds another degree of freedom for design of real-time multi-object tracking systems. Supplementary Table 2 presents a comprehensive comparison of the scope and key improvements in this study. This work can potentially be used for low-power obstacle tracking and avoidance in autonomous vehicles using SNNs. Additionally, it is useful for implementing energy-efficient spiking or oscillatory neuron networks as well as dynamic sensory and memory system applications involving SFA or PIR functionalities.

Methods

Device fabrication

The devices were fabricated on 4 in. p⁺-Si/(285 nm)SiO₂ wafers. First, the channel gate (G_C) and the barrier gate (G_B) were patterned using electron beam lithography (EBL) in Raith 150-Two. The two G_B electrodes were shorted during the EBL by design. Cr/Au (3/30 nm) metallization for gate electrodes was done in an ATC Orion (a 7-target sputtering system) by AJA International followed by a lift-off process. hBN and 2D channel material (MoS₂, WSe₂, WS₂) flakes were mechanically exfoliated onto scotch tape from crystals purchased from SPI Supplies. Afterwards, these hBN and 2D channel material flakes were transferred onto the substrate using polydimethylsiloxane-assisted dry transfer method and locally aligned on the structure under a microscope. Next, the source/drain (S/D) electrodes were patterned using EBL such that there is an overlap with the G_Bs on both sides. This allows for better control over contact barriers by the G_B. Lastly, Cr/Au (3/100 nm) was sputtered for the devices with n-type MoS₂ and WS₂; and Cr/Pt/Au (3/30/100 nm) was sputtered on the device with p-type WSe₂ for the S/D contacts.

Device characterization

AFM measurements for MoS₂ and hBN flakes were carried out in an MFP-3D system by Oxford Instruments. All steady-state electrical data was recorded under ambient conditions using a B1500A semiconductor device parameter analyzer module by Keysight. Bell-shaped curves were recorded by simultaneously sweeping two voltage channels in the B1500A.

Circuit simulations and analysis

All circuit simulations were performed using Spectre (Cadence). The scaled data from the 2D-ST measurements was input as a lookup table-based Verilog-A model. All transistors and MOSCAPs were taken from a general purpose 45 nm process design kit (gpdk045). The results were collected as comma-separated values files and processed for subsequent analysis and parameter extraction.