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Constructing in-chip micro-supercapacitors of 3D graphene nanowall/ruthenium oxides electrode through silicon-based microfabrication technique
Journal of Power Sources ( IF 9.2 ) Pub Date : 2018-09-05 , DOI: 10.1016/j.jpowsour.2018.08.099
Jinhua Li , Minjie Zhu , Zhonglie An , Zhuqing Wang , Masaya Toda , Takahito Ono

The rapid development of sensor networks for smart industry requires comparable tiny power sources that can deliver high energetic performance and be mass-produced via the existed semi-conductor process. In this paper, novel 3D in-chip micro-supercapacitors (MSCs) based on hierarchical electrodes were developed through silicon-based microfabrication techniques by depositing graphene nanowall (GNW)/ruthenium oxides (RuOx) core-shell hybrids on the silicon scaffolds that are generated from deep reactive ion etching (DRIE). Conformal coating of RuOx on individual graphene nanoflakes was realized via reactive sputtering technique to benefit capacitance enhancement, while the orderly aligned GNW facilitated fast ions and electrons transfer. By harnessing both the merits of huge active surface area of the 3D hierarchical electrode architectures and the excellent electrochemical behaviors of the GNW/RuOx hybrids, the assembled MSCs exhibited areal energy, power densities of 15.1 μWh cm−2 and 2.49 mW cm−2, respectively. In parallel with our novel in-chip strategy by leveraging the bulk volume of Si substrate to create sidewall for effective area enhancement at footprint, the embedment of electrode nanostructures inside the substrate may also give a new concept of MSCs design towards protecting the fragile electrode materials and making the subsequent device encapsulation with ease.



中文翻译:

通过硅基微细加工技术构建3D石墨烯纳米壁/氧化钌电极的芯片内超级电容器

面向智能行业的传感器网络的快速发展需要可比的微型电源,这些电源可以提供高能量性能并通过现有的半导体工艺进行批量生产。本文通过在硅支架上沉积石墨烯纳米壁(GNW)/氧化钌(RuO x)核-壳杂化体,通过基于硅的微制造技术,开发了基于分层电极的新型3D片内微型超级电容器(MSC)。由深反应离子蚀刻(DRIE)产生。RuO x的保形涂层通过反应溅射技术在单个石墨烯纳米薄片上实现了单晶石墨烯纳米片的制备,以增强电容,同时有序排列的GNW促进了离子和电子的快速转移。通过利用3D分层电极架构的巨大有效表面积和GNW / RuO x杂化物的出色电化学行为,组装的MSC表现出面能,功率密度分别为15.1μWhcm -2和2.49 mW cm -2, 分别。与我们通过利用硅衬底的大体积来创建侧壁以在占位面积上有效增加面积的新型芯片内策略并行的是,将电极纳米结构嵌入衬底内部也可能为保护易碎电极材料提供MSC设计的新概念并轻松进行后续设备封装。

更新日期:2018-09-05
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