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Materials, processing and reliability of low temperature bonding in 3D chip stacking
Journal of Alloys and Compounds ( IF 6.2 ) Pub Date : 2018-04-07
Liang Zhang, Zhi-quan Liu, Sinn-Wen Chen, Yao-dong Wang, Wei-Min Long, Yong-huan Guo, Song-quan Wang, Guo Ye, Liu Wen-yi

Due to the advantages of small form factor, high performance, low power consumption, and high density integration, three-dimensional integrated circuits (3D ICs) have been generally acknowledged as the next generation semiconductor technology. Low temperature bonding is the key technology to ensure the chip (or wafer) stacking in 3D ICs. In this paper, different low temperature bonding methods for chip (or wafer) stacking were reviewed and described systematically. Materials, processing and reliability will be extremely important, their effects on the 3D IC structure were addressed in detail, the challenging reliability issues may be considered as the major concern in the future work. The latest development of low temperature bonding in 3D ICs is also given here, which helpful may provide a reference for the further study of low temperature bonding.



中文翻译:

3D芯片堆叠中低温键合的材料,工艺和可靠性

由于小尺寸,高性能,低功耗和高密度集成的优势,三维集成电路(3D IC)已被普遍认为是下一代半导体技术。低温粘接是确保3D IC中的芯片(或晶圆)堆叠的关键技术。在本文中,系统地回顾和描述了用于芯片(或晶片)堆叠的不同低温键合方法。材料,工艺和可靠性将极为重要,详细讨论了它们对3D IC结构的影响,具有挑战性的可靠性问题可能被视为未来工作中的主要关注点。此处还提供了3D IC中低温键合的最新进展,

更新日期:2018-04-07
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