Substitution of (Al³⁺, Nb⁵⁺) co–dopants into TiO₆ octahedral sites of CaCu₃Ti₄O₁₂ ceramics, which were prepared by a solid state reaction method and sintered at 1090 °C for 18 h, can cause a great reduction in a low–frequency loss tangent (tanδ≈0.045–0.058) compared to those of Al³⁺ or Nb⁵⁺ single–doped CaCu₃Ti₄O₁₂. Notably, very high dielectric permittivities of 2.9 − 4.1 × 10⁴ with good dielectric–temperature stability are achieved. The room–temperature grain boundary resistance (R_gb≈0.37–1.17 × 10⁹ Ω.cm) and related conduction activation energy (E_gb≈0.781–0.817 eV), as well as the non–Ohmic properties of the co–doped ceramics are greatly enhanced compared to single–doped ceramics (R_gb≈10⁴–10⁶ Ω cm and E_gb≈0.353–0.619 eV). The results show the importance of grain boundary properties for controlling the nonlinear–electrical and giant–dielectric properties of CaCu₃Ti₄O₁₂ ceramics, supporting the internal barrier layer capacitor model of Schottky barriers at grain boundaries.

通过固态反应方法制备并在1090°C烧结18 h的CaAl ₃ Ti ₄ O ₁₂陶瓷的TiO ₆八面体位点取代（Al ³⁺，Nb ⁵⁺）共掺杂剂可能会引起晶化。与Al ³⁺或Nb ⁵⁺单掺杂CaCu ₃ Ti ₄ O ₁₂相比，低频损耗角正切值（tanδ≈0.045-0.058）大大降低。值得注意的是，获得了2.9-4.1×10 ^4的极高介电常数，并具有良好的介电温度稳定性。室温晶界电阻（R _gb ≈0.37–1.17×10⁹  Ω.cm）和相关的传导活化能（E _GB ≈0.781-0.817电子伏特），以及共掺杂陶瓷的非欧姆特性都大大提高相比单掺杂的陶瓷（R _GB ≈10 ⁴ - 10 ⁶  Ω厘米和E _GB ≈0.353-0.619电子伏特）。结果表明，晶界特性对于控制CaCu ₃ Ti ₄ O ₁₂陶瓷的非线性，电和超介电特性具有重要意义，支持晶界处肖特基势垒的内部势垒层电容器模型。