In this study, the rising forming voltage issue during device cell scale‐down in resistance random access memory (RRAM) is solved by introducing new high‐permittivity (high‐k) material as the side‐wall spacer structure, unlike the normally used low‐permittivity (low‐k) material. Simulated electrical fields based on COMSOL Multiphysics software results suggest a RRAM device with a high‐k spacer effectively confines the electric field. The effects of this confined electric field are notable, especially when the device cell is scaled down. The device fabrication process is modified to incorporate the high‐k sidewall. Cross‐sectional transmission electron microscopy imaging confirms the existence of SiO₂ and HfO₂ as the spacer structures in two different devices. Electrical measurements of forming voltages ranging from 1 to 0.16 µm² are conducted to verify the effects. Statistical measurements confirm that the forming voltages of the devices with high‐k material as sidewall do not increase with a reduction in device cell size. Moreover, reliability tests, including endurance and retention for the high‐k sidewall device, also exhibit very stable resistance switching characteristics. As a result, the structure that is proposed successfully solves the forming voltage issues within small device cells in RRAM without any cost to device reliability.

中文翻译：

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使用High-k间隔结构解决电阻式随机存取存储器中形成电压升高的缩放问题

在这项研究中，通过引入新的高介电常数（high- k）材料作为侧壁隔离层结构，解决了电阻随机存取存储器（RRAM）器件单元缩小期间形成电压升高的问题，这与通常使用的低电阻材料不同。介电常数（低k）材料。基于COMSOL Multiphysics软件结果的模拟电场表明，具有高k间隔物的RRAM设备可有效限制电场。这种受限电场的影响非常明显，尤其是在按比例缩小器件单元时。修改了器件的制造工艺，以包含高k侧壁。截面透射电子显微镜成像证实了SiO ₂和HfO的存在_图2是两个不同装置中的隔离结构。进行了1到0.16 µm ²范围内的成形电压的电学测量，以验证其效果。统计测量结果证实，具有高k材料作为侧壁的器件的形成电压不会随着器件单元尺寸的减小而增加。此外，可靠性测试，包括对高k侧壁器件的耐久性和保持力，也显示出非常稳定的电阻开关特性。结果，所提出的结构成功地解决了RRAM中的小型器件单元内的形成电压问题，而没有任何器件可靠性的代价。